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Adds some extra notes, starts getting into trying to run the IIgs.
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@ -85,11 +85,12 @@ class ConcreteMachine:
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forceinline Cycles perform_bus_operation(const CPU::WDC65816::BusOperation operation, const uint32_t address, uint8_t *const value) {
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const auto ®ion = MemoryMapRegion(memory_, address);
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printf("%06x\n", address);
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if(region.flags & MemoryMap::Region::IsIO) {
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// TODO: all IO accesses.
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assert(false);
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} else {
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// TODO: branching below is predicated on the idea that an extra 64kb of scratch write area
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// and 64kb of 0xffs would be worse than branching due to the data set increase. Verify that?
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if(isReadOperation(operation)) {
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MemoryMapRead(region, address, value);
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} else {
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@ -204,6 +204,11 @@ class MemoryMap {
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}
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}
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void access(uint16_t address, bool is_read) {
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auxiliary_switches_.access(address, is_read);
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if(address &0xfff0 == 0xc080) language_card_.access(address, is_read);
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}
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private:
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Apple::II::AuxiliaryMemorySwitches<MemoryMap> auxiliary_switches_;
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Apple::II::LanguageCardSwitches<MemoryMap> language_card_;
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@ -436,6 +441,9 @@ class MemoryMap {
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// adjust as required.
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};
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// TODO: branching below on region.read/write is predicated on the idea that extra scratch space
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// would be less efficient. Verify that?
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#define MemoryMapRegion(map, address) map.regions[map.region_map[address >> 8]]
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#define MemoryMapRead(region, address, value) *value = region.read ? region.read[address] : 0xff
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#define MemoryMapWrite(map, region, address, value) \
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