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synced 2024-11-23 03:32:32 +00:00
Corrects Scc (and other conditionals) for complex addressing modes.
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@ -71,20 +71,20 @@ class QL: public CPU::MC68000::BusHandler {
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case Microcycle::SelectWord | Microcycle::Read:
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cycle.value->full = is_peripheral ? peripheral_result : base[word_address];
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if(!(cycle.operation & Microcycle::IsProgram)) printf("\n[word r %08x -> %04x]\t", *cycle.address, cycle.value->full);
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if(!(cycle.operation & Microcycle::IsProgram)) printf("\n[%08x -> %04x]\t", *cycle.address, cycle.value->full);
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break;
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case Microcycle::SelectByte | Microcycle::Read:
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cycle.value->halves.low = (is_peripheral ? peripheral_result : base[word_address]) >> cycle.byte_shift();
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if(!(cycle.operation & Microcycle::IsProgram)) printf("\n[byte r %08x -> %02x]\t", *cycle.address, cycle.value->halves.low);
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if(!(cycle.operation & Microcycle::IsProgram)) printf("\n[%08x -> %02x]\t", *cycle.address, cycle.value->halves.low);
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break;
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case Microcycle::SelectWord:
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assert(!(is_rom && !is_peripheral));
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if(!(cycle.operation & Microcycle::IsProgram)) printf("\n{word w %04x -> %08x}\t", cycle.value->full, *cycle.address);
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if(!(cycle.operation & Microcycle::IsProgram)) printf("\n{%04x -> %08x}\t", cycle.value->full, *cycle.address);
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if(!is_peripheral) base[word_address] = cycle.value->full;
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break;
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case Microcycle::SelectByte:
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assert(!(is_rom && !is_peripheral));
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if(!(cycle.operation & Microcycle::IsProgram)) printf("\n{byte w %02x -> %08x}\t", cycle.value->halves.low, *cycle.address);
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if(!(cycle.operation & Microcycle::IsProgram)) printf("\n{%02x -> %08x}\t", cycle.value->halves.low, *cycle.address);
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if(!is_peripheral) base[word_address] = (cycle.value->halves.low << cycle.byte_shift()) | (base[word_address] & (0xffff ^ cycle.byte_mask()));
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break;
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}
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@ -61,10 +61,13 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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// }
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static bool should_log = false;
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should_log |= program_counter_.full > 0x286;
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should_log |= program_counter_.full >= 0x4F54;
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if(should_log) {
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std::cout << "a5:" << std::setw(8) << std::setfill('0') << address_[5].full << " ";
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std::cout << "a6:" << std::setw(8) << std::setfill('0') << address_[6].full << " ";
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std::cout << "d0:" << std::setw(8) << std::setfill('0') << data_[0].full << " ";
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std::cout << "d1:" << std::setw(8) << std::setfill('0') << data_[1].full << " ";
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std::cout << "d2:" << std::setw(8) << std::setfill('0') << data_[2].full << " ";
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// std::cout << "a5:" << std::setw(8) << std::setfill('0') << address_[5].full << " ";
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// std::cout << "a6:" << std::setw(8) << std::setfill('0') << address_[6].full << " ";
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std::cout << "a7:" << std::setw(8) << std::setfill('0') << address_[7].full << " ";
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if(is_supervisor_) {
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std::cout << "usp:" << std::setw(8) << std::setfill('0') << stack_pointers_[0].full << " ";
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@ -80,6 +83,7 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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std::cerr << "68000 Abilities exhausted; can't manage instruction " << std::hex << decoded_instruction_ << " from " << (program_counter_.full - 4) << std::endl;
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return;
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} else {
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if(0x4f7a == program_counter_.full - 4) return;
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if(should_log) std::cout << std::hex << (program_counter_.full - 4) << ": " << std::setw(4) << decoded_instruction_ << '\t';
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}
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@ -319,7 +323,7 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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const bool is_bsr = ((decoded_instruction_ >> 8) & 0xf) == 1;
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// Test the conditional, treating 'false' as true.
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const bool should_branch = is_bsr || evaluate_condition(prefetch_queue_.halves.high.halves.high);
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const bool should_branch = is_bsr || evaluate_condition(decoded_instruction_ >> 8);
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// Schedule something appropriate, by rewriting the program for this instruction temporarily.
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if(should_branch) {
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@ -341,7 +345,7 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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case Operation::DBcc: {
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// Decide what sort of DBcc this is.
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if(!evaluate_condition(prefetch_queue_.halves.high.halves.high)) {
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if(!evaluate_condition(decoded_instruction_ >> 8)) {
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-- active_program_->source->halves.low.full;
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const auto target_program_counter = program_counter_.full + int16_t(prefetch_queue_.halves.low.full) - 2;
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@ -365,7 +369,7 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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case Operation::Scc: {
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active_program_->destination->halves.low.halves.low =
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evaluate_condition(prefetch_queue_.halves.high.halves.high) ? 0xff : 0x00;
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evaluate_condition(decoded_instruction_ >> 8) ? 0xff : 0x00;
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} break;
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/*
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