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https://github.com/TomHarte/CLK.git
synced 2024-11-25 01:32:55 +00:00
Make bit masks easily testable; expand logging.
This commit is contained in:
Thomas Harte
parent
7aeea535a1
commit
0e4615564d
@ -57,6 +57,16 @@ constexpr std::array<Zone, 0x20> zones(bool is_read) {
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return zones;
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}
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template <int start, int end> struct BitMask {
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static_assert(start >= end);
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static constexpr uint32_t value = ((1 << (start + 1)) - 1) - ((1 << end) - 1);
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};
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static_assert(BitMask<0, 0>::value == 1);
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static_assert(BitMask<1, 1>::value == 2);
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static_assert(BitMask<15, 15>::value == 32768);
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static_assert(BitMask<15, 0>::value == 0xffff);
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static_assert(BitMask<15, 14>::value == 49152);
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}
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namespace Archimedes {
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@ -312,21 +322,20 @@ struct Interrupts {
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bool write(uint32_t address, uint8_t value) {
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const auto target = address & AddressMask;
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logger.error().append("IO controller write of %02x at %08x", value, address);
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switch(target) {
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default:
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logger.error().append("Unrecognised IOC write of %02x at %08x", value, address);
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break;
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case 0x3200000 & AddressMask:
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case 0x320'0000 & AddressMask:
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logger.error().append("TODO: IOC control write %02x", value);
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return true;
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case 0x3200004 & AddressMask:
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logger.error().append("TODO: IOC serial transmit");
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case 0x320'0004 & AddressMask:
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logger.error().append("TODO: IOC serial transmit %02x", value);
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return true;
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case 0x3200014 & AddressMask:
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case 0x320'0014 & AddressMask:
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// b2: clear IF.
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// b3: clear IR.
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// b4: clear POR.
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@ -336,42 +345,82 @@ struct Interrupts {
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return true;
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// Interrupts.
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case 0x3200018 & AddressMask: irq_a_.mask = value; return true;
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case 0x3200028 & AddressMask: irq_b_.mask = value; return true;
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case 0x3200038 & AddressMask: fiq_.mask = value; return true;
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case 0x320'0018 & AddressMask: irq_a_.mask = value; return true;
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case 0x320'0028 & AddressMask: irq_b_.mask = value; return true;
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case 0x320'0038 & AddressMask: fiq_.mask = value; return true;
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// Counters.
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case 0x3200040 & AddressMask:
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case 0x3200050 & AddressMask:
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case 0x3200060 & AddressMask:
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case 0x3200070 & AddressMask:
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case 0x320'0040 & AddressMask:
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case 0x320'0050 & AddressMask:
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case 0x320'0060 & AddressMask:
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case 0x320'0070 & AddressMask:
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counters_[(target >> 4) - 0x4].reload = uint16_t(
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(counters_[(target >> 4) - 0x4].reload & 0xff00) | value
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);
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return true;
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case 0x3200044 & AddressMask:
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case 0x3200054 & AddressMask:
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case 0x3200064 & AddressMask:
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case 0x3200074 & AddressMask:
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case 0x320'0044 & AddressMask:
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case 0x320'0054 & AddressMask:
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case 0x320'0064 & AddressMask:
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case 0x320'0074 & AddressMask:
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counters_[(target >> 4) - 0x4].reload = uint16_t(
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(counters_[(target >> 4) - 0x4].reload & 0x00ff) | (value << 8)
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);
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return true;
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case 0x3200048 & AddressMask:
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case 0x3200058 & AddressMask:
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case 0x3200068 & AddressMask:
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case 0x3200078 & AddressMask:
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case 0x320'0048 & AddressMask:
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case 0x320'0058 & AddressMask:
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case 0x320'0068 & AddressMask:
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case 0x320'0078 & AddressMask:
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counters_[(target >> 4) - 0x4].value = counters_[(target >> 4) - 0x4].reload;
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return true;
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case 0x320004c & AddressMask:
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case 0x320005c & AddressMask:
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case 0x320006c & AddressMask:
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case 0x320007c & AddressMask:
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case 0x320'004c & AddressMask:
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case 0x320'005c & AddressMask:
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case 0x320'006c & AddressMask:
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case 0x320'007c & AddressMask:
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counters_[(target >> 4) - 0x4].output = counters_[(target >> 4) - 0x4].value;
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return true;
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case 0x327'0000 & AddressMask:
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logger.error().append("TODO: exteded external podule space");
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return true;
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case 0x331'0000 & AddressMask:
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logger.error().append("TODO: 1772 / disk write");
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return true;
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case 0x335'0000 & AddressMask:
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logger.error().append("TODO: LS374 / printer data write");
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return true;
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case 0x335'0018 & AddressMask:
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logger.error().append("TODO: latch B write");
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return true;
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case 0x335'0040 & AddressMask:
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logger.error().append("TODO: latch A write");
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return true;
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case 0x335'0048 & AddressMask:
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logger.error().append("TODO: latch C write");
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return true;
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case 0x336'0000 & AddressMask:
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logger.error().append("TODO: podule interrupt request");
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return true;
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case 0x336'0004 & AddressMask:
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logger.error().append("TODO: podule interrupt mask");
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return true;
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case 0x33a'0000 & AddressMask:
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logger.error().append("TODO: 6854 / econet write");
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return true;
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case 0x33b'0000 & AddressMask:
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logger.error().append("TODO: 6551 / serial line write");
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return true;
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}
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return false;
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@ -424,10 +473,15 @@ struct Memory {
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}
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template <typename IntT>
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bool write(uint32_t address, IntT source, InstructionSet::ARM::Mode mode, bool) {
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uint32_t aligned(uint32_t address) {
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if constexpr (std::is_same_v<IntT, uint32_t>) {
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address &= static_cast<uint32_t>(~3);
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return address & static_cast<uint32_t>(~3);
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}
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return address;
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}
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template <typename IntT>
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bool write(uint32_t address, IntT source, InstructionSet::ARM::Mode mode, bool) {
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if(mode == InstructionSet::ARM::Mode::User && address < 0x2000000) {
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return false;
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}
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@ -452,7 +506,7 @@ struct Memory {
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low_rom_access_time_ = ROMAccessTime((address >> 4) & 3);
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page_size_ = PageSize((address >> 2) & 3);
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logger.info().append("MEMC Control: %08x -> OS:%d sound:%d video:%d high:%d low:%d size:%d", address, os_mode_, sound_dma_enable_, video_dma_enable_, high_rom_access_time_, low_rom_access_time_, page_size_);
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logger.info().append("MEMC Control: %08x -> OS:%d sound:%d video:%d refresh:%d high:%d low:%d size:%d", address, os_mode_, sound_dma_enable_, video_dma_enable_, dynamic_ram_refresh_, high_rom_access_time_, low_rom_access_time_, page_size_);
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update_mapping();
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return true;
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@ -462,6 +516,7 @@ struct Memory {
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break;
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case Zone::LogicallyMappedRAM: {
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update_mapping();
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const auto item = logical_ram<IntT, false>(address, mode);
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if(!item) {
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return false;
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@ -485,9 +540,9 @@ struct Memory {
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return true;
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case Zone::AddressTranslator:
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// printf("Translator write at %08x\n", address);
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printf("Translator write at %08x\n", address);
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pages_[address & 0x7f] = address;
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update_mapping();
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// update_mapping();
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break;
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default:
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@ -580,12 +635,14 @@ struct Memory {
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template <typename IntT>
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IntT &physical_ram(uint32_t address) {
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const auto access_address = address & (ram_.size() - 1);
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return *reinterpret_cast<IntT *>(&ram_[access_address]);
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address = aligned<IntT>(address);
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address &= (ram_.size() - 1);
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return *reinterpret_cast<IntT *>(&ram_[address]);
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}
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template <typename IntT>
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IntT &high_rom(uint32_t address) {
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address = aligned<IntT>(address);
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return *reinterpret_cast<IntT *>(&rom_[address & (rom_.size() - 1)]);
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}
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@ -640,6 +697,7 @@ struct Memory {
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template <typename IntT, bool is_read>
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IntT *logical_ram(uint32_t address, InstructionSet::ARM::Mode mode) {
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address = aligned<IntT>(address);
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address &= 0x1ff'ffff;
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size_t page;
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@ -716,10 +774,6 @@ struct Memory {
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// Clear all logical mappings.
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std::fill(mapping_.begin(), mapping_.end(), MappedPage{});
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const auto bits = [](int start, int end) -> uint32_t {
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return ((1 << (start + 1)) - 1) - ((1 << end) - 1);
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};
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// For each physical page, project it into logical space
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// and store it.
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for(const auto page: pages_) {
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@ -730,57 +784,57 @@ struct Memory {
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// 4kb:
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// A[6:0] -> PPN[6:0]
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// A[11:10] -> LPN[12:11]; A[22:12] -> LPN[10:0] i.e. 8192 logical pages
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physical = page & bits(6, 0);
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physical = page & BitMask<6, 0>::value;
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physical <<= 12;
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logical = (page & bits(11, 10)) << 1;
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logical |= (page & bits(22, 12)) >> 12;
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logical = (page & BitMask<11, 10>::value) << 1;
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logical |= (page & BitMask<22, 12>::value) >> 12;
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break;
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case PageSize::kb8:
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// 8kb:
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// A[0] -> PPN[6]; A[6:1] -> PPN[5:0]
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// A[11:10] -> LPN[11:10]; A[22:13] -> LPN[9:0] i.e. 4096 logical pages
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physical = (page & bits(0, 0)) << 6;
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physical |= (page & bits(6, 1)) >> 1;
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physical = (page & BitMask<0, 0>::value) << 6;
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physical |= (page & BitMask<6, 1>::value) >> 1;
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physical <<= 13;
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logical = page & bits(11, 10);
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logical |= (page & bits(22, 13)) >> 13;
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logical = page & BitMask<11, 10>::value;
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logical |= (page & BitMask<22, 13>::value) >> 13;
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break;
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case PageSize::kb16:
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// 16kb:
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// A[1:0] -> PPN[6:5]; A[6:2] -> PPN[4:0]
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// A[11:10] -> LPN[10:9]; A[22:14] -> LPN[8:0] i.e. 2048 logical pages
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physical = (page & bits(1, 0)) << 5;
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physical |= (page & bits(6, 2)) >> 2;
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physical = (page & BitMask<1, 0>::value) << 5;
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physical |= (page & BitMask<6, 2>::value) >> 2;
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physical <<= 14;
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logical = (page & bits(11, 10)) >> 1;
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logical |= (page & bits(22, 14)) >> 14;
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logical = (page & BitMask<11, 10>::value) >> 1;
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logical |= (page & BitMask<22, 14>::value) >> 14;
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break;
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case PageSize::kb32:
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// 32kb:
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// A[1] -> PPN[6]; A[2] -> PPN[5]; A[0] -> PPN[4]; A[6:3] -> PPN[3:0]
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// A[11:10] -> LPN[9:8]; A[22:15] -> LPN[7:0] i.e. 1024 logical pages
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physical = (page & bits(1, 1)) << 5;
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physical |= (page & bits(2, 2)) << 3;
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physical |= (page & bits(0, 0)) << 4;
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physical |= (page & bits(6, 3)) >> 3;
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physical = (page & BitMask<1, 1>::value) << 5;
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physical |= (page & BitMask<2, 2>::value) << 3;
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physical |= (page & BitMask<0, 0>::value) << 4;
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physical |= (page & BitMask<6, 3>::value) >> 3;
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physical <<= 15;
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logical = (page & bits(11, 10)) >> 2;
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logical |= (page & bits(22, 15)) >> 15;
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logical = (page & BitMask<11, 10>::value) >> 2;
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logical |= (page & BitMask<22, 15>::value) >> 15;
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break;
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}
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// printf("%08x => logical %d -> physical %d\n", page, logical, (physical >> 15));
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printf("%08x => logical %d -> physical %d\n", page, logical, (physical >> 15));
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// TODO: consider clashes.
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// TODO: what if there's less than 4mb present?
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@ -864,7 +918,7 @@ class ConcreteMachine:
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// printf("");
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// }
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// log |= (executor_.pc() > 0x02000000 && executor_.pc() < 0x02000078);
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// log |= executor_.pc() == 0x03801980;
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log |= executor_.pc() == 0x03810398;
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// log |= (executor_.pc() > 0x03801000);
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// log &= executor_.pc() != 0x03801a0c;
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