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mirror of https://github.com/TomHarte/CLK.git synced 2024-07-01 14:29:51 +00:00

Adjusts NCR address decoding to produce a more plausible initial interaction.

This commit is contained in:
Thomas Harte 2019-08-11 22:43:25 -04:00
parent 895c315fa5
commit 0f67e490e8
2 changed files with 17 additions and 17 deletions

View File

@ -15,36 +15,36 @@ using namespace NCR::NCR5380;
void NCR5380::write(int address, uint8_t value) {
switch(address & 7) {
case 0:
LOG("[SCSI] Set current SCSI bus state to " << PADHEX(2) << value);
LOG("[SCSI 0] Set current SCSI bus state to " << PADHEX(2) << int(value));
break;
case 1:
LOG("[SCSI] Initiator command register set: " << PADHEX(2) << value);
LOG("[SCSI 1] Initiator command register set: " << PADHEX(2) << int(value));
break;
case 2:
LOG("[SCSI] Set mode: " << PADHEX(2) << value);
LOG("[SCSI 2] Set mode: " << PADHEX(2) << int(value));
mode_ = value;
break;
case 3:
LOG("[SCSI] Set target command: " << PADHEX(2) << value);
LOG("[SCSI 3] Set target command: " << PADHEX(2) << int(value));
break;
case 4:
LOG("[SCSI] Set select enabled: " << PADHEX(2) << value);
LOG("[SCSI 4] Set select enabled: " << PADHEX(2) << int(value));
break;
case 5:
LOG("[SCSI] Start DMA send: " << PADHEX(2) << value);
LOG("[SCSI 5] Start DMA send: " << PADHEX(2) << int(value));
break;
case 6:
LOG("[SCSI] Start DMA target receive: " << PADHEX(2) << value);
LOG("[SCSI 6] Start DMA target receive: " << PADHEX(2) << int(value));
break;
case 7:
LOG("[SCSI] Start DMA initiator receive: " << PADHEX(2) << value);
LOG("[SCSI 7] Start DMA initiator receive: " << PADHEX(2) << int(value));
break;
}
}
@ -52,35 +52,35 @@ void NCR5380::write(int address, uint8_t value) {
uint8_t NCR5380::read(int address) {
switch(address & 7) {
case 0:
LOG("[SCSI] Get current SCSI bus state");
LOG("[SCSI 0] Get current SCSI bus state");
return 0xff;
case 1:
LOG("[SCSI] Initiator command register get");
LOG("[SCSI 1] Initiator command register get");
return 0xff;
case 2:
LOG("[SCSI] Get mode");
LOG("[SCSI 2] Get mode");
return mode_;
case 3:
LOG("[SCSI] Get target command");
LOG("[SCSI 3] Get target command");
return 0xff;
case 4:
LOG("[SCSI] Get current bus state");
LOG("[SCSI 4] Get current bus state");
return 0xff;
case 5:
LOG("[SCSI] Get bus and status");
LOG("[SCSI 5] Get bus and status");
return 0x03;
case 6:
LOG("[SCSI] Get input data");
LOG("[SCSI 6] Get input data");
return 0xff;
case 7:
LOG("[SCSI] Reset parity/interrupt");
LOG("[SCSI 7] Reset parity/interrupt");
return 0xff;
}
return 0;

View File

@ -235,7 +235,7 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
} return delay;
case BusDevice::SCSI: {
const int register_address = word_address >> 2; // TODO: this is a guess.
const int register_address = word_address >> 3;
// Even accesses = read; odd = write.
if(*cycle.address & 1) {