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Adjusts NCR address decoding to produce a more plausible initial interaction.
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@ -15,36 +15,36 @@ using namespace NCR::NCR5380;
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void NCR5380::write(int address, uint8_t value) {
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void NCR5380::write(int address, uint8_t value) {
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switch(address & 7) {
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switch(address & 7) {
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case 0:
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case 0:
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LOG("[SCSI] Set current SCSI bus state to " << PADHEX(2) << value);
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LOG("[SCSI 0] Set current SCSI bus state to " << PADHEX(2) << int(value));
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break;
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break;
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case 1:
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case 1:
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LOG("[SCSI] Initiator command register set: " << PADHEX(2) << value);
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LOG("[SCSI 1] Initiator command register set: " << PADHEX(2) << int(value));
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break;
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break;
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case 2:
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case 2:
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LOG("[SCSI] Set mode: " << PADHEX(2) << value);
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LOG("[SCSI 2] Set mode: " << PADHEX(2) << int(value));
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mode_ = value;
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mode_ = value;
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break;
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break;
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case 3:
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case 3:
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LOG("[SCSI] Set target command: " << PADHEX(2) << value);
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LOG("[SCSI 3] Set target command: " << PADHEX(2) << int(value));
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break;
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break;
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case 4:
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case 4:
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LOG("[SCSI] Set select enabled: " << PADHEX(2) << value);
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LOG("[SCSI 4] Set select enabled: " << PADHEX(2) << int(value));
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break;
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break;
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case 5:
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case 5:
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LOG("[SCSI] Start DMA send: " << PADHEX(2) << value);
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LOG("[SCSI 5] Start DMA send: " << PADHEX(2) << int(value));
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break;
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break;
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case 6:
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case 6:
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LOG("[SCSI] Start DMA target receive: " << PADHEX(2) << value);
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LOG("[SCSI 6] Start DMA target receive: " << PADHEX(2) << int(value));
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break;
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break;
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case 7:
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case 7:
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LOG("[SCSI] Start DMA initiator receive: " << PADHEX(2) << value);
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LOG("[SCSI 7] Start DMA initiator receive: " << PADHEX(2) << int(value));
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break;
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break;
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}
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}
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}
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}
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@ -52,35 +52,35 @@ void NCR5380::write(int address, uint8_t value) {
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uint8_t NCR5380::read(int address) {
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uint8_t NCR5380::read(int address) {
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switch(address & 7) {
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switch(address & 7) {
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case 0:
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case 0:
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LOG("[SCSI] Get current SCSI bus state");
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LOG("[SCSI 0] Get current SCSI bus state");
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return 0xff;
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return 0xff;
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case 1:
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case 1:
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LOG("[SCSI] Initiator command register get");
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LOG("[SCSI 1] Initiator command register get");
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return 0xff;
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return 0xff;
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case 2:
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case 2:
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LOG("[SCSI] Get mode");
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LOG("[SCSI 2] Get mode");
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return mode_;
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return mode_;
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case 3:
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case 3:
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LOG("[SCSI] Get target command");
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LOG("[SCSI 3] Get target command");
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return 0xff;
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return 0xff;
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case 4:
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case 4:
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LOG("[SCSI] Get current bus state");
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LOG("[SCSI 4] Get current bus state");
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return 0xff;
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return 0xff;
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case 5:
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case 5:
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LOG("[SCSI] Get bus and status");
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LOG("[SCSI 5] Get bus and status");
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return 0x03;
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return 0x03;
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case 6:
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case 6:
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LOG("[SCSI] Get input data");
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LOG("[SCSI 6] Get input data");
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return 0xff;
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return 0xff;
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case 7:
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case 7:
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LOG("[SCSI] Reset parity/interrupt");
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LOG("[SCSI 7] Reset parity/interrupt");
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return 0xff;
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return 0xff;
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}
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}
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return 0;
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return 0;
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@ -235,7 +235,7 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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} return delay;
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} return delay;
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case BusDevice::SCSI: {
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case BusDevice::SCSI: {
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const int register_address = word_address >> 2; // TODO: this is a guess.
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const int register_address = word_address >> 3;
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// Even accesses = read; odd = write.
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// Even accesses = read; odd = write.
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if(*cycle.address & 1) {
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if(*cycle.address & 1) {
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