1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-07-06 01:28:57 +00:00

Through temporarily dramatically increased logging, fixed conditional JP.

This commit is contained in:
Thomas Harte 2017-05-20 23:03:52 -04:00
parent 6688f83226
commit 103c863534
2 changed files with 2 additions and 2 deletions

View File

@ -161,7 +161,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
#define PUSH(x) {MicroOp::Decrement16, &sp_.full}, STOREL(x.bytes.high, sp_), {MicroOp::Decrement16, &sp_.full}, STOREL(x.bytes.low, sp_)
#define POP(x) FETCHL(x.bytes.low, sp_), {MicroOp::Increment16, &sp_.full}, FETCHL(x.bytes.high, sp_), {MicroOp::Increment16, &sp_.full}
#define JP(cc) Program(FETCH16(temporary_, pc_), {MicroOp::cc}, {MicroOp::Move16, &address_.full, &pc_.full})
#define JP(cc) Program(FETCH16(address_, pc_), {MicroOp::cc}, {MicroOp::Move16, &address_.full, &pc_.full})
#define LD(a, b) Program({MicroOp::Move8, &b, &a})
#define LD_GROUP(r) \

View File

@ -19,7 +19,7 @@ int AllRAMProcessor::perform_machine_cycle(const MachineCycle *cycle) {
printf("! ");
check_address_for_trap(*cycle->address);
case BusOperation::Read:
printf("r %04x [%02x]\n", *cycle->address, memory_[*cycle->address]);
printf("r %04x [%02x] AF:%04x BC:%04x DE:%04x HL:%04x SP:%04x\n", *cycle->address, memory_[*cycle->address], get_value_of_register(CPU::Z80::Register::AF), get_value_of_register(CPU::Z80::Register::BC), get_value_of_register(CPU::Z80::Register::DE), get_value_of_register(CPU::Z80::Register::HL), get_value_of_register(CPU::Z80::Register::StackPointer));
*cycle->value = memory_[*cycle->address];
break;
case BusOperation::Write: