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https://github.com/TomHarte/CLK.git
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Makes a buggy first attempt at bitplane data collection.
This commit is contained in:
Thomas Harte
parent
ec9cb21fae
commit
10a5e7313f
@ -33,6 +33,7 @@ template <DMAFlag... Flags> struct DMAMask: Mask<DMAFlag, Flags...> {};
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Chipset::Chipset(uint16_t *ram, size_t size) :
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blitter_(ram, size),
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bitplanes_(*this, ram, size),
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copper_(*this, ram, size),
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disk_(*this, ram, size),
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crt_(908, 4, Outputs::Display::Type::PAL50, Outputs::Display::InputDataType::Red4Green4Blue4) {
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@ -231,9 +232,13 @@ template <int cycle, bool stop_if_cpu> bool Chipset::perform_cycle() {
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fetch_horizontal_ &= cycle != display_window_stop_[0];
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// Top priority: bitplane collection.
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if(fetch_horizontal_ && fetch_vertical_ && (dma_control_ & BitplaneFlag) == BitplaneFlag) {
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if((dma_control_ & BitplaneFlag) == BitplaneFlag) {
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// TODO: offer a cycle for bitplane collection.
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// Probably need to indicate odd or even?
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if(fetch_horizontal_ && fetch_vertical_ && bitplanes_.template advance<cycle&1>()) {
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did_fetch_ = true;
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return false;
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}
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}
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if constexpr (cycle & 1) {
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@ -348,6 +353,13 @@ template <bool stop_on_cpu> Chipset::Changes Chipset::run(HalfCycles length) {
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fetch_vertical_ |= y_ == display_window_start_[1];
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fetch_vertical_ &= y_ != display_window_stop_[1];
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if(did_fetch_) {
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// TODO: find out when modulos are actually applied, since
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// they're dynamically programmable.
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bitplanes_.do_end_of_line();
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did_fetch_ = false;
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}
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if(y_ == frame_height_) {
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++changes.vsyncs;
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interrupt_requests_ |= InterruptMask<InterruptFlag::VerticalBlank>::value;
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@ -366,6 +378,11 @@ template <bool stop_on_cpu> Chipset::Changes Chipset::run(HalfCycles length) {
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return changes;
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}
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void Chipset::post_bitplanes(const BitplaneData &data) {
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// TODO.
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(void)data;
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}
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void Chipset::update_interrupts() {
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interrupt_level_ = 0;
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@ -446,9 +463,9 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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break;
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// Disk DMA.
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case Write(0x020): disk_.set_address<16>(cycle.value16()); break;
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case Write(0x022): disk_.set_address<0>(cycle.value16()); break;
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case Write(0x024): disk_.set_length(cycle.value16()); break;
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case Write(0x020): disk_.set_address<0, 16>(cycle.value16()); break;
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case Write(0x022): disk_.set_address<0, 0>(cycle.value16()); break;
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case Write(0x024): disk_.set_length(cycle.value16()); break;
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case Write(0x026):
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LOG("TODO: disk DMA; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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@ -523,14 +540,18 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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break;
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// Bitplanes.
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case Write(0x0e0): case Write(0x0e2):
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case Write(0x0e4): case Write(0x0e6):
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case Write(0x0e8): case Write(0x0ea):
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case Write(0x0ec): case Write(0x0ee):
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case Write(0x0f0): case Write(0x0f2):
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case Write(0x0f4): case Write(0x0f6):
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LOG("TODO: Bitplane pointer; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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case Write(0x0e0): bitplanes_.set_address<0, 16>(cycle.value16()); break;
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case Write(0x0e2): bitplanes_.set_address<0, 0>(cycle.value16()); break;
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case Write(0x0e4): bitplanes_.set_address<1, 16>(cycle.value16()); break;
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case Write(0x0e6): bitplanes_.set_address<1, 0>(cycle.value16()); break;
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case Write(0x0e8): bitplanes_.set_address<2, 16>(cycle.value16()); break;
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case Write(0x0ea): bitplanes_.set_address<2, 0>(cycle.value16()); break;
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case Write(0x0ec): bitplanes_.set_address<3, 16>(cycle.value16()); break;
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case Write(0x0ee): bitplanes_.set_address<3, 0>(cycle.value16()); break;
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case Write(0x0f0): bitplanes_.set_address<4, 16>(cycle.value16()); break;
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case Write(0x0f2): bitplanes_.set_address<4, 0>(cycle.value16()); break;
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case Write(0x0f4): bitplanes_.set_address<5, 16>(cycle.value16()); break;
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case Write(0x0f6): bitplanes_.set_address<5, 0>(cycle.value16()); break;
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case Write(0x100):
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case Write(0x102):
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@ -678,6 +699,69 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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#undef RW
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}
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// MARK: - Bitplanes.
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template <bool is_odd> bool Chipset::Bitplanes::advance() {
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// Offset is preincremented in order to simplify the exit
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// pathways below. As a result all in-switch offsets are
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// off by 1. This is dealt with in the macro.
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++collection_offset_;
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// TODO: possibly dispatch a BitplaneData.
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// The chipset has responsibility for applying a delay,
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// and the pixel-level start/stop boundaries.
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#define BIND_CYCLE(offset, plane) \
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case (offset + 1)&7: \
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if(plane_count_ > plane) { \
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next[plane] = ram_[addresses_[plane] & ram_mask_]; \
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++addresses_[plane]; \
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if constexpr (!plane) { \
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chipset_.post_bitplanes(next); \
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} \
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return true; \
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} \
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return false;
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if(is_high_res_) {
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// TODO: I'm unclear whether this is correct, or merely
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// an artefact of the way the Hardware Reference Manual
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// depicts per-line DMA responsibilities.
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if(collection_offset_ < 4) {
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return false;
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}
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switch(collection_offset_&7) {
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default: return false;
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BIND_CYCLE(0, 3);
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BIND_CYCLE(1, 1);
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BIND_CYCLE(2, 2);
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BIND_CYCLE(3, 0);
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BIND_CYCLE(4, 3);
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BIND_CYCLE(5, 1);
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BIND_CYCLE(6, 2);
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BIND_CYCLE(7, 0);
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}
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} else {
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switch(collection_offset_&7) {
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default: return false;
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BIND_CYCLE(1, 3);
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BIND_CYCLE(2, 5);
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BIND_CYCLE(3, 1);
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BIND_CYCLE(5, 2);
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BIND_CYCLE(6, 4);
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BIND_CYCLE(7, 0);
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}
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}
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return false;
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}
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void Chipset::Bitplanes::do_end_of_line() {
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// TODO: apply modulos.
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collection_offset_ = 0;
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}
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// MARK: - Sprites.
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void Chipset::Sprite::set_pointer(int shift, uint16_t value) {
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@ -704,8 +788,8 @@ bool Chipset::DiskDMA::advance() {
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if(!write_) {
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// TODO: run an actual PLL, collect actual disk data.
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if(length_) {
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ram_[address_ & ram_mask_] = 0xffff;
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++address_;
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ram_[addresses_[0] & ram_mask_] = 0xffff;
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++addresses_[0];
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--length_;
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if(!length_) {
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@ -96,16 +96,31 @@ class Chipset {
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private:
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// MARK: - Common base for DMA components.
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class DMADevice {
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class DMADeviceBase {
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public:
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DMADevice(Chipset &chipset, uint16_t *ram, size_t size) : chipset_(chipset), ram_(ram), ram_mask_(uint32_t(size - 1)) {}
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DMADeviceBase(Chipset &chipset, uint16_t *ram, size_t size) : chipset_(chipset), ram_(ram), ram_mask_(uint32_t(size - 1)) {}
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protected:
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Chipset &chipset_;
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uint16_t *ram_ = nullptr;
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uint32_t ram_mask_ = 0;
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};
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friend DMADevice;
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friend DMADeviceBase;
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template <size_t num_addresses> class DMADevice: public DMADeviceBase {
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public:
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using DMADeviceBase::DMADeviceBase;
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/// Writes the word @c value to the address register @c id, shifting it by @c shift (0 or 16) first.
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template <int id, int shift> void set_address(uint16_t value) {
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static_assert(id < num_addresses);
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static_assert(shift == 0 || shift == 16);
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addresses_[id] = (addresses_[id] & (0xffff'0000 >> shift)) | uint32_t(value << shift);
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}
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protected:
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std::array<uint32_t, num_addresses> addresses_{};
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};
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// MARK: - Interrupts.
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@ -147,9 +162,6 @@ class Chipset {
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// Current raster position.
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int line_cycle_ = 0, y_ = 0;
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// class Bitplanes: public DMADevice {
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//
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// };
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// Parameters affecting bitplane collection and output.
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uint16_t display_window_start_[2] = {0, 0};
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uint16_t display_window_stop_[2] = {0, 0};
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@ -157,15 +169,32 @@ class Chipset {
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// Ephemeral bitplane collection state.
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bool fetch_vertical_ = false, fetch_horizontal_ = false;
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bool did_fetch_ = false;
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using BitplaneData = std::array<uint16_t, 6>;
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BitplaneData next;
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class Bitplanes: public DMADevice<6> {
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public:
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using DMADevice::DMADevice;
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template <bool is_odd> bool advance();
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void do_end_of_line();
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private:
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bool is_high_res_ = false;
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int collection_offset_ = 0;
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int plane_count_ = 1;
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BitplaneData next;
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} bitplanes_;
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void post_bitplanes(const BitplaneData &data);
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// MARK: - Copper.
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class Copper: public DMADevice {
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class Copper: public DMADevice<2> {
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public:
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using DMADevice::DMADevice;
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using DMADevice<2>::DMADevice;
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/// Offers a DMA slot to the Copper, specifying the current beam position.
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///
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@ -178,11 +207,6 @@ class Chipset {
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state_ = State::FetchFirstWord;
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}
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/// Writes the word @c value to the address register @c id, shifting it by @c shift (0 or 16) first.
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template <int id, int shift> void set_address(uint16_t value) {
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addresses_[id] = (addresses_[id] & (0xffff'0000 >> shift)) | uint32_t(value << shift);
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}
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/// Sets the Copper control word.
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void set_control(uint16_t c) {
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control_ = c;
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@ -195,7 +219,6 @@ class Chipset {
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private:
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uint32_t address_ = 0;
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uint32_t addresses_[2]{};
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uint16_t control_ = 0;
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enum class State {
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@ -220,28 +243,23 @@ class Chipset {
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// MARK: - Disk drives.
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class DiskDMA: public DMADevice {
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class DiskDMA: public DMADevice<1> {
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public:
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using DMADevice::DMADevice;
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template <int shift> void set_address(uint16_t value) {
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address_ = (address_ & (0xffff'0000 >> shift)) | uint32_t(value << shift);
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}
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void set_length(uint16_t value) {
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dma_enable_ = value & 0x8000;
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write_ = value & 0x4000;
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length_ = value & 0x3fff;
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if(dma_enable_) {
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printf("Not yet implemented: disk DMA [%s of %d to %06x]\n", write_ ? "write" : "read", length_, address_);
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printf("Not yet implemented: disk DMA [%s of %d to %06x]\n", write_ ? "write" : "read", length_, addresses_[0]);
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}
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}
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bool advance();
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private:
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uint32_t address_;
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uint16_t length_;
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bool dma_enable_ = false;
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bool write_ = false;
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@ -65,6 +65,7 @@
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buildConfiguration = "Debug"
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selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
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selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
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enableAddressSanitizer = "YES"
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enableASanStackUseAfterReturn = "YES"
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disableMainThreadChecker = "YES"
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launchStyle = "0"
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