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Avoid type-in-function-name, Z80 edition.

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This commit is contained in:
Thomas Harte 2023-05-10 18:42:19 -05:00
parent ea50d5bda7
commit 10cd2a36cf
8 changed files with 42 additions and 42 deletions
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8
Machines/AmstradCPC/AmstradCPC.cpp
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@ -905,7 +905,7 @@ template <bool has_fdc> class ConcreteMachine:
// first bit of this byte. // first bit of this byte.
parser.process_pulse(tape_player_.get_current_pulse()); parser.process_pulse(tape_player_.get_current_pulse());
const auto byte = parser.get_byte(tape_player_.get_tape()); const auto byte = parser.get_byte(tape_player_.get_tape());
auto flags = z80_.get_value_of_register(CPU::Z80::Register::Flags); auto flags = z80_.value_of(CPU::Z80::Register::Flags);
if(byte) { if(byte) {
// In A ROM-esque fashion, begin the first pulse after the final one // In A ROM-esque fashion, begin the first pulse after the final one
@ -927,14 +927,14 @@ template <bool has_fdc> class ConcreteMachine:
write_pointers_[(tape_crc_address+1) >> 14][(tape_crc_address+1) & 16383] = uint8_t(crc_value >> 8); write_pointers_[(tape_crc_address+1) >> 14][(tape_crc_address+1) & 16383] = uint8_t(crc_value >> 8);
// Indicate successful byte read. // Indicate successful byte read.
z80_.set_value_of_register(CPU::Z80::Register::A, *byte); z80_.set_value_of(CPU::Z80::Register::A, *byte);
flags |= CPU::Z80::Flag::Carry; flags |= CPU::Z80::Flag::Carry;
} else { } else {
// TODO: return tape player to previous state and decline to serve. // TODO: return tape player to previous state and decline to serve.
z80_.set_value_of_register(CPU::Z80::Register::A, 0); z80_.set_value_of(CPU::Z80::Register::A, 0);
flags &= ~CPU::Z80::Flag::Carry; flags &= ~CPU::Z80::Flag::Carry;
} }
z80_.set_value_of_register(CPU::Z80::Register::Flags, flags); z80_.set_value_of(CPU::Z80::Register::Flags, flags);
// RET. // RET.
*cycle.value = 0xc9; *cycle.value = 0xc9;

14
Machines/MSX/MSX.cpp
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@ -472,8 +472,8 @@ class ConcreteMachine:
i8255_.write(0xab, 0x8); i8255_.write(0xab, 0x8);
// Disable interrupts. // Disable interrupts.
z80_.set_value_of_register(CPU::Z80::Register::IFF1, 0); z80_.set_value_of(CPU::Z80::Register::IFF1, 0);
z80_.set_value_of_register(CPU::Z80::Register::IFF2, 0); z80_.set_value_of(CPU::Z80::Register::IFF2, 0);
// Use the parser to find a header, and if one is found then populate // Use the parser to find a header, and if one is found then populate
// LOWLIM and WINWID, and reset carry. Otherwise set carry. // LOWLIM and WINWID, and reset carry. Otherwise set carry.
@ -482,9 +482,9 @@ class ConcreteMachine:
if(new_speed) { if(new_speed) {
ram()[0xfca4] = new_speed->minimum_start_bit_duration; ram()[0xfca4] = new_speed->minimum_start_bit_duration;
ram()[0xfca5] = new_speed->low_high_disrimination_duration; ram()[0xfca5] = new_speed->low_high_disrimination_duration;
z80_.set_value_of_register(CPU::Z80::Register::Flags, 0); z80_.set_value_of(CPU::Z80::Register::Flags, 0);
} else { } else {
z80_.set_value_of_register(CPU::Z80::Register::Flags, 1); z80_.set_value_of(CPU::Z80::Register::Flags, 1);
} }
// RET. // RET.
@ -507,10 +507,10 @@ class ConcreteMachine:
// If a byte was found, return it with carry unset. Otherwise set carry to // If a byte was found, return it with carry unset. Otherwise set carry to
// indicate error. // indicate error.
if(next_byte >= 0) { if(next_byte >= 0) {
z80_.set_value_of_register(CPU::Z80::Register::A, uint16_t(next_byte)); z80_.set_value_of(CPU::Z80::Register::A, uint16_t(next_byte));
z80_.set_value_of_register(CPU::Z80::Register::Flags, 0); z80_.set_value_of(CPU::Z80::Register::Flags, 0);
} else { } else {
z80_.set_value_of_register(CPU::Z80::Register::Flags, 1); z80_.set_value_of(CPU::Z80::Register::Flags, 1);
} }
// RET. // RET.

4
Machines/Sinclair/ZX8081/ZX8081.cpp
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@ -235,10 +235,10 @@ template<bool is_zx81> class ConcreteMachine:
const uint64_t prior_offset = tape_player_.get_tape()->get_offset(); const uint64_t prior_offset = tape_player_.get_tape()->get_offset();
const int next_byte = parser_.get_next_byte(tape_player_.get_tape()); const int next_byte = parser_.get_next_byte(tape_player_.get_tape());
if(next_byte != -1) { if(next_byte != -1) {
const uint16_t hl = z80_.get_value_of_register(CPU::Z80::Register::HL); const uint16_t hl = z80_.value_of(CPU::Z80::Register::HL);
ram_[hl & ram_mask_] = uint8_t(next_byte); ram_[hl & ram_mask_] = uint8_t(next_byte);
*cycle.value = 0x00; *cycle.value = 0x00;
z80_.set_value_of_register(CPU::Z80::Register::ProgramCounter, tape_return_address_ - 1); z80_.set_value_of(CPU::Z80::Register::ProgramCounter, tape_return_address_ - 1);
// Assume that having read one byte quickly, we're probably going to be asked to read // Assume that having read one byte quickly, we're probably going to be asked to read
// another shortly. Therefore, temporarily disable the tape motor for 1000 cycles in order // another shortly. Therefore, temporarily disable the tape motor for 1000 cycles in order

20
Machines/Sinclair/ZXSpectrum/ZXSpectrum.cpp
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@ -914,15 +914,15 @@ template<Model model> class ConcreteMachine:
Parser parser(Parser::MachineType::ZXSpectrum); Parser parser(Parser::MachineType::ZXSpectrum);
using Register = CPU::Z80::Register; using Register = CPU::Z80::Register;
uint8_t flags = uint8_t(z80_.get_value_of_register(Register::FlagsDash)); uint8_t flags = uint8_t(z80_.value_of(Register::FlagsDash));
if(!(flags & 1)) return false; if(!(flags & 1)) return false;
const uint8_t block_type = uint8_t(z80_.get_value_of_register(Register::ADash)); const uint8_t block_type = uint8_t(z80_.value_of(Register::ADash));
const auto block = parser.find_block(tape_player_.get_tape()); const auto block = parser.find_block(tape_player_.get_tape());
if(!block || block_type != (*block).type) return false; if(!block || block_type != (*block).type) return false;
uint16_t length = z80_.get_value_of_register(Register::DE); uint16_t length = z80_.value_of(Register::DE);
uint16_t target = z80_.get_value_of_register(Register::IX); uint16_t target = z80_.value_of(Register::IX);
flags = 0x93; flags = 0x93;
uint8_t parity = 0x00; uint8_t parity = 0x00;
@ -942,16 +942,16 @@ template<Model model> class ConcreteMachine:
if(!stored_parity) { if(!stored_parity) {
flags &= ~1; flags &= ~1;
} else { } else {
z80_.set_value_of_register(Register::L, *stored_parity); z80_.set_value_of(Register::L, *stored_parity);
} }
z80_.set_value_of_register(Register::Flags, flags); z80_.set_value_of(Register::Flags, flags);
z80_.set_value_of_register(Register::DE, length); z80_.set_value_of(Register::DE, length);
z80_.set_value_of_register(Register::IX, target); z80_.set_value_of(Register::IX, target);
const uint8_t h = (flags & 1) ? 0x00 : 0xff; const uint8_t h = (flags & 1) ? 0x00 : 0xff;
z80_.set_value_of_register(Register::H, h); z80_.set_value_of(Register::H, h);
z80_.set_value_of_register(Register::A, h); z80_.set_value_of(Register::A, h);
return true; return true;
} }

24
OSBindings/Mac/Clock SignalTests/Z80ContentionTests.mm
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@ -39,34 +39,34 @@ struct CapturingZ80: public CPU::Z80::BusHandler {
// Set the flags so that if this is a conditional operation, it'll succeed. // Set the flags so that if this is a conditional operation, it'll succeed.
if((*code.begin())&0x8) { if((*code.begin())&0x8) {
z80_.set_value_of_register(CPU::Z80::Register::Flags, 0xff); z80_.set_value_of(CPU::Z80::Register::Flags, 0xff);
} else { } else {
z80_.set_value_of_register(CPU::Z80::Register::Flags, 0x00); z80_.set_value_of(CPU::Z80::Register::Flags, 0x00);
} }
// Set the refresh address to the EE page and set A to 0x80. // Set the refresh address to the EE page and set A to 0x80.
z80_.set_value_of_register(CPU::Z80::Register::I, 0xe0); z80_.set_value_of(CPU::Z80::Register::I, 0xe0);
z80_.set_value_of_register(CPU::Z80::Register::A, 0x80); z80_.set_value_of(CPU::Z80::Register::A, 0x80);
// Set BC, DE and HL. // Set BC, DE and HL.
z80_.set_value_of_register(CPU::Z80::Register::BC, initial_bc_de_hl); z80_.set_value_of(CPU::Z80::Register::BC, initial_bc_de_hl);
z80_.set_value_of_register(CPU::Z80::Register::DE, initial_bc_de_hl); z80_.set_value_of(CPU::Z80::Register::DE, initial_bc_de_hl);
z80_.set_value_of_register(CPU::Z80::Register::HL, initial_bc_de_hl); z80_.set_value_of(CPU::Z80::Register::HL, initial_bc_de_hl);
// Set IX and IY. // Set IX and IY.
z80_.set_value_of_register(CPU::Z80::Register::IX, initial_ix_iy); z80_.set_value_of(CPU::Z80::Register::IX, initial_ix_iy);
z80_.set_value_of_register(CPU::Z80::Register::IY, initial_ix_iy); z80_.set_value_of(CPU::Z80::Register::IY, initial_ix_iy);
// Set SP. // Set SP.
z80_.set_value_of_register(CPU::Z80::Register::StackPointer, initial_sp); z80_.set_value_of(CPU::Z80::Register::StackPointer, initial_sp);
} }
void set_de(uint16_t value) { void set_de(uint16_t value) {
z80_.set_value_of_register(CPU::Z80::Register::DE, value); z80_.set_value_of(CPU::Z80::Register::DE, value);
} }
void set_bc(uint16_t value) { void set_bc(uint16_t value) {
z80_.set_value_of_register(CPU::Z80::Register::BC, value); z80_.set_value_of(CPU::Z80::Register::BC, value);
} }
void run_for(int cycles) { void run_for(int cycles) {

4
Processors/Z80/AllRAM/Z80AllRAM.cpp
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@ -83,11 +83,11 @@ class ConcreteAllRAMProcessor: public AllRAMProcessor, public BusHandler {
} }
uint16_t get_value_of_register(Register r) final { uint16_t get_value_of_register(Register r) final {
return z80_.get_value_of_register(r); return z80_.value_of(r);
} }
void set_value_of_register(Register r, uint16_t value) final { void set_value_of_register(Register r, uint16_t value) final {
z80_.set_value_of_register(r, value); z80_.set_value_of(r, value);
} }
bool get_halt_line() final { bool get_halt_line() final {

4
Processors/Z80/Implementation/Z80Base.cpp
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@ -15,7 +15,7 @@ void ProcessorBase::reset_power_on() {
last_request_status_ &= ~Interrupt::PowerOn; last_request_status_ &= ~Interrupt::PowerOn;
} }
uint16_t ProcessorBase::get_value_of_register(Register r) const { uint16_t ProcessorBase::value_of(Register r) const {
switch (r) { switch (r) {
case Register::ProgramCounter: return pc_.full; case Register::ProgramCounter: return pc_.full;
case Register::StackPointer: return sp_.full; case Register::StackPointer: return sp_.full;
@ -67,7 +67,7 @@ uint16_t ProcessorBase::get_value_of_register(Register r) const {
} }
} }
void ProcessorBase::set_value_of_register(Register r, uint16_t value) { void ProcessorBase::set_value_of(Register r, uint16_t value) {
switch (r) { switch (r) {
case Register::ProgramCounter: pc_.full = value; break; case Register::ProgramCounter: pc_.full = value; break;
case Register::StackPointer: sp_.full = value; break; case Register::StackPointer: sp_.full = value; break;

6
Processors/Z80/Z80.hpp
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@ -410,12 +410,12 @@ class ProcessorBase: public ProcessorStorage {
/*! /*!
Gets the value of a register. Gets the value of a register.
@see set_value_of_register @see set_value_of
@param r The register to set. @param r The register to set.
@returns The value of the register. 8-bit registers will be returned as unsigned. @returns The value of the register. 8-bit registers will be returned as unsigned.
*/ */
uint16_t get_value_of_register(Register r) const; uint16_t value_of(Register r) const;
/*! /*!
Sets the value of a register. Sets the value of a register.
@ -425,7 +425,7 @@ class ProcessorBase: public ProcessorStorage {
@param r The register to set. @param r The register to set.
@param value The value to set. If the register is only 8 bit, the value will be truncated. @param value The value to set. If the register is only 8 bit, the value will be truncated.
*/ */
void set_value_of_register(Register r, uint16_t value); void set_value_of(Register r, uint16_t value);
/*! /*!
Gets the value of the HALT output line. Gets the value of the HALT output line.