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Use common macros for the two forms of Perform.
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Thomas Harte
parent
4993801741
commit
11a9a5c126
@ -1233,6 +1233,18 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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Access(operand_[next_operand_].high); // nW
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MoveToNextOperand(StoreOperand_l);
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#define PerformDynamic() \
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>( \
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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#define PerformSpecific(x) \
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InstructionSet::M68k::perform< \
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InstructionSet::M68k::Model::M68000, \
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ProcessorBase, \
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InstructionSet::M68k::Operation::x \
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>( \
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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//
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// Various generic forms of perform.
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//
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@ -1241,21 +1253,18 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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if(operand_flags_ & 0x0c) MoveToState(StoreOperand) else MoveToState(Decode)
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BeginState(Perform_np):
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformDynamic();
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Prefetch(); // np
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MoveToWritePhase();
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BeginState(Perform_np_n):
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformDynamic();
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Prefetch(); // np
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IdleBus(1); // n
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MoveToWritePhase();
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BeginState(Perform_np_nn):
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformDynamic();
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Prefetch(); // np
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IdleBus(2); // nn
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MoveToWritePhase();
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@ -1308,8 +1317,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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Prefetch(); // np
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformDynamic();
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SetupDataAccess(0, select_flag_);
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Access(operand_[1].low); // nw
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@ -1334,8 +1342,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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registers_[8 + instruction_.reg(1)].l -= 2;
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Access(operand_[1].high); // nR
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformDynamic();
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SetupDataAccess(0, Microcycle::SelectWord);
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@ -1353,12 +1360,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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//
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BeginState(CHK):
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Prefetch(); // np
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InstructionSet::M68k::perform<
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InstructionSet::M68k::Model::M68000,
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ProcessorBase,
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InstructionSet::M68k::Operation::CHK
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>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformSpecific(CHK);
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// Proper next state will have been set by the flow controller
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// call-in; just allow dispatch to whatever it was.
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@ -1385,12 +1387,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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//
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BeginState(Scc_Dn):
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Prefetch(); // np
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InstructionSet::M68k::perform<
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InstructionSet::M68k::Model::M68000,
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ProcessorBase,
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InstructionSet::M68k::Operation::Scc
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>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformSpecific(Scc);
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// Next state will be set by did_scc.
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break;
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@ -1408,15 +1405,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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BeginState(DBcc):
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operand_[0] = registers_[instruction_.reg(0)];
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operand_[1].w = uint32_t(int16_t(prefetch_.w));
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InstructionSet::M68k::perform<
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InstructionSet::M68k::Model::M68000,
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ProcessorBase,
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InstructionSet::M68k::Operation::DBcc
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>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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// Just do the write-back here.
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PerformSpecific(DBcc);
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registers_[instruction_.reg(0)].w = operand_[0].w;
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// Next state was set by complete_dbcc.
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@ -1452,18 +1441,14 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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//
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BeginState(Bcc_b):
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operand_[0].b = uint8_t(opcode_);
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformSpecific(Bccb);
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// Next state was set by complete_bcc.
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break;
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BeginState(Bcc_w):
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operand_[0].w = prefetch_.w;
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformSpecific(Bccw);
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// Next state was set by complete_bcc.
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break;
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@ -1508,8 +1493,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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registers_[15].l -= 2;
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// Get the new PC.
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformDynamic();
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Prefetch(); // np
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Prefetch(); // np
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@ -1540,8 +1524,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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// BSET, BCHG, BCLR
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//
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BeginState(BCHG_BSET_Dn):
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformDynamic();
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Prefetch();
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IdleBus(1 + dynamic_instruction_length_);
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@ -1549,12 +1532,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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MoveToState(Decode);
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BeginState(BCLR_Dn):
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InstructionSet::M68k::perform<
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InstructionSet::M68k::Model::M68000,
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ProcessorBase,
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InstructionSet::M68k::Operation::BCLR
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>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformSpecific(BCLR);
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Prefetch();
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IdleBus(2 + dynamic_instruction_length_);
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@ -1653,8 +1631,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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//
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BeginState(LogicalToSR):
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// Perform the operation.
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformDynamic();
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// Recede the program counter and prefetch twice.
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program_counter_.l -= 2;
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@ -1860,8 +1837,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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exception_vector_ = -1;
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// Perform the instruction.
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InstructionSet::M68k::perform<InstructionSet::M68k::Model::M68000>(
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instruction_, operand_[0], operand_[1], status_, *static_cast<ProcessorBase *>(this));
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PerformDynamic();
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// Delay the correct amount of time.
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IdleBus(dynamic_instruction_length_);
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@ -1893,6 +1869,8 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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assert(false);
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}}
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#undef PerformDynamic
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#undef PerformSpecific
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#undef Prefetch
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#undef ReadProgramWord
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#undef ReadDataWord
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