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Corrects divide-by-zero exception length, enables all other DIVS checks.

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This commit is contained in:
Thomas Harte 2019-07-01 15:46:04 -04:00
parent 514e57b3e9
commit 11d8f765b2
2 changed files with 14 additions and 14 deletions
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26
OSBindings/Mac/Clock SignalTests/68000ArithmeticTests.mm
View File

@ -693,7 +693,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0x4768f231); XCTAssertEqual(state.data[1], 0x4768f231);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative | Flag::Overflow); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative | Flag::Overflow);
// XCTAssertEqual(20, _machine->get_cycle_count()); XCTAssertEqual(20, _machine->get_cycle_count());
} }
- (void)testDIVSOverflow { - (void)testDIVSOverflow {
@ -714,7 +714,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0x026190D3); XCTAssertEqual(state.data[1], 0x026190D3);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative);
// XCTAssertEqual(138, _machine->get_cycle_count()); XCTAssertEqual(138, _machine->get_cycle_count());
} }
- (void)testDIVS_3 { - (void)testDIVS_3 {
@ -723,7 +723,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 1); XCTAssertEqual(state.data[1], 1);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend);
// XCTAssertEqual(158, _machine->get_cycle_count()); XCTAssertEqual(158, _machine->get_cycle_count());
} }
- (void)testDIVS_4 { - (void)testDIVS_4 {
@ -732,7 +732,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0xfffffffb); XCTAssertEqual(state.data[1], 0xfffffffb);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative);
// XCTAssertEqual(158, _machine->get_cycle_count()); XCTAssertEqual(158, _machine->get_cycle_count());
} }
- (void)testDIVS_5 { - (void)testDIVS_5 {
@ -741,7 +741,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0xb03de); XCTAssertEqual(state.data[1], 0xb03de);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend);
// XCTAssertEqual(138, _machine->get_cycle_count()); XCTAssertEqual(138, _machine->get_cycle_count());
} }
- (void)testDIVS_6 { - (void)testDIVS_6 {
@ -750,7 +750,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0x650000); XCTAssertEqual(state.data[1], 0x650000);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Zero); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Zero);
// XCTAssertEqual(156, _machine->get_cycle_count()); XCTAssertEqual(156, _machine->get_cycle_count());
} }
- (void)testDIVSExpensiveOverflow { - (void)testDIVSExpensiveOverflow {
@ -760,7 +760,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0x80000000); XCTAssertEqual(state.data[1], 0x80000000);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative | Flag::Overflow); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative | Flag::Overflow);
// XCTAssertEqual(158, _machine->get_cycle_count()); XCTAssertEqual(158, _machine->get_cycle_count());
} }
- (void)testDIVS_8 { - (void)testDIVS_8 {
@ -770,7 +770,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0x1); XCTAssertEqual(state.data[1], 0x1);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend);
// XCTAssertEqual(158, _machine->get_cycle_count()); XCTAssertEqual(158, _machine->get_cycle_count());
} }
- (void)testDIVS_9 { - (void)testDIVS_9 {
@ -780,7 +780,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0xc97eb240); XCTAssertEqual(state.data[1], 0xc97eb240);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative);
// XCTAssertEqual(148, _machine->get_cycle_count()); XCTAssertEqual(148, _machine->get_cycle_count());
} }
- (void)testDIVS_10 { - (void)testDIVS_10 {
@ -790,7 +790,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0x305e105f); XCTAssertEqual(state.data[1], 0x305e105f);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend);
// XCTAssertEqual(142, _machine->get_cycle_count()); XCTAssertEqual(142, _machine->get_cycle_count());
} }
- (void)testDIVS_11 { - (void)testDIVS_11 {
@ -800,7 +800,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0x0bfa00ed); XCTAssertEqual(state.data[1], 0x0bfa00ed);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend);
// XCTAssertEqual(144, _machine->get_cycle_count()); XCTAssertEqual(144, _machine->get_cycle_count());
} }
- (void)testDIVS_12 { - (void)testDIVS_12 {
@ -810,7 +810,7 @@
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0x39dcffd4); XCTAssertEqual(state.data[1], 0x39dcffd4);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative);
// XCTAssertEqual(150, _machine->get_cycle_count()); XCTAssertEqual(150, _machine->get_cycle_count());
} }
- (void)testDIVSException { - (void)testDIVSException {
@ -822,7 +822,7 @@
XCTAssertEqual(state.data[1], 0x1fffffff); XCTAssertEqual(state.data[1], 0x1fffffff);
XCTAssertEqual(state.supervisor_stack_pointer, 0xfffffffa); XCTAssertEqual(state.supervisor_stack_pointer, 0xfffffffa);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend);
// XCTAssertEqual(42, _machine->get_cycle_count()); XCTAssertEqual(42, _machine->get_cycle_count());
} }
// MARK: DIVU // MARK: DIVU

2
Processors/68000/Implementation/68000Implementation.hpp
View File

@ -972,7 +972,7 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
bus_program = active_micro_op_->bus_program; \ bus_program = active_micro_op_->bus_program; \
\ \
populate_trap_steps(5, get_status()); \ populate_trap_steps(5, get_status()); \
bus_program->microcycle.length = HalfCycles(8); \ bus_program->microcycle.length = HalfCycles(20); \
\ \
program_counter_.full -= 2; program_counter_.full -= 2;