diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index f254806f9..62981004a 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -192,7 +192,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { // 1b. Absolute; a, JMP. static void absolute_jmp(AccessType, bool, const std::function &target) { - target(CycleFetchIncrementPC); // New PCL.] + target(CycleFetchIncrementPC); // New PCL. target(CycleFetchPC); // New PCH. target(OperationPerform); // [JMP] } @@ -201,10 +201,10 @@ struct CPU::WDC65816::ProcessorStorageConstructor { static void absolute_jsr(AccessType, bool, const std::function &target) { target(CycleFetchIncrementPC); // New PCL. target(CycleFetchPC); // New PCH. - target(CycleFetchPCThrowaway); // IO - target(OperationPerform); // [JSR] - target(CyclePush); // PCH - target(CyclePush); // PCL + target(CycleFetchPCThrowaway); // IO. + target(OperationPerform); // [JSR]. + target(CyclePush); // PCH. + target(CyclePush); // PCL. } // 1d. Absolute; a, read-modify-write. @@ -232,8 +232,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(CycleFetchIncrementPC); // AAL. target(OperationCopyPCToData); // Prepare to push. - target(CyclePush); // PCH - target(CyclePush); // PCL + target(CyclePush); // PCH. + target(CyclePush); // PCL. target(CycleFetchPC); // AAH. target(CycleFetchPCThrowaway); // IO. @@ -250,9 +250,9 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(CycleFetchPC); // New AAH. target(OperationConstructAbsolute16); // Calculate data address. - target(CycleFetchIncrementData); // New PCL - target(CycleFetchIncrementData); // New PCH - target(CycleFetchData); // New PBR + target(CycleFetchIncrementData); // New PCL. + target(CycleFetchIncrementData); // New PCH. + target(CycleFetchData); // New PBR. target(OperationPerform); // [JML] } @@ -263,8 +263,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(CycleFetchPC); // New AAH. target(OperationConstructAbsolute16); // Calculate data address. - target(CycleFetchIncrementData); // New PCL - target(CycleFetchData); // New PCH + target(CycleFetchIncrementData); // New PCL. + target(CycleFetchData); // New PCH. target(OperationPerform); // [JMP] } @@ -303,8 +303,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(OperationConstructAbsolute); // Calculate data address. target(OperationPerform); // [JSL] - target(CyclePush); // PCH - target(CyclePush); // PCL + target(CyclePush); // PCH. + target(CyclePush); // PCL. } // 5. Absolute long, X; al, x. @@ -328,7 +328,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { } else { target(OperationConstructAbsoluteX); // Calculate data address. } - target(CycleFetchIncorrectDataAddress); // Do the dummy read if necessary; OperationConstructAbsoluteX + target(CycleFetchIncorrectDataAddress); // Do the dummy read if necessary; OperationConstructAbsoluteXRead // will skip this if it isn't required. read_write(type, is8bit, target); @@ -355,7 +355,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { } else { target(OperationConstructAbsoluteY); // Calculate data address. } - target(CycleFetchIncorrectDataAddress); // Do the dummy read if necessary; OperationConstructAbsoluteX + target(CycleFetchIncorrectDataAddress); // Do the dummy read if necessary; OperationConstructAbsoluteYRead // will skip this if it isn't required. read_write(type, is8bit, target); @@ -420,8 +420,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(CycleFetchPCThrowaway); // IO. - target(CycleFetchIncrementData); // AAL - target(CycleFetchData); // AAH + target(CycleFetchIncrementData); // AAL. + target(CycleFetchData); // AAH. target(OperationCopyDataToInstruction); target(OperationConstructAbsolute); @@ -545,14 +545,14 @@ struct CPU::WDC65816::ProcessorStorageConstructor { // 19a. Implied; i. static void implied(AccessType, bool, const std::function &target) { - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. target(OperationPerform); } // 19b. Implied; i; XBA. static void implied_xba(AccessType, bool, const std::function &target) { - target(CycleFetchPCThrowaway); // IO - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. + target(CycleFetchPCThrowaway); // IO. target(OperationPerform); } @@ -560,24 +560,25 @@ struct CPU::WDC65816::ProcessorStorageConstructor { // 19d. Wait for interrupt. static void stp_wai(AccessType, bool, const std::function &target) { target(OperationPerform); // Establishes the termination condition. - target(CycleFetchPCThrowaway); // IO - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. + target(CycleFetchPCThrowaway); // IO. target(CycleRepeatingNone); // This will first check whether the STP/WAI exit // condition has occurred; if not then it'll issue - // a BusOperation::None and then reschedule itself. + // either a BusOperation::None or ::Ready and then + // reschedule itself. } // 20. Relative; r. static void relative(AccessType, bool, const std::function &target) { - target(CycleFetchIncrementPC); // Offset + target(CycleFetchIncrementPC); // Offset. target(OperationPerform); // The branch instructions will all skip one or three // of the next cycles, depending on the effect of // the jump. It'll also calculate the correct target // address, placing it into the data buffer. - target(CycleFetchPCThrowaway); // IO - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. + target(CycleFetchPCThrowaway); // IO. target(OperationCopyDataToPC); // Install the address that was calculated above. } @@ -586,34 +587,34 @@ struct CPU::WDC65816::ProcessorStorageConstructor { static void relative_long(AccessType, bool, const std::function &target) { target(CycleFetchIncrementPC); // Offset low. target(CycleFetchIncrementPC); // Offset high. - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. target(OperationPerform); // [BRL] } // 22a. Stack; s, abort/irq/nmi/res. static void stack_exception(AccessType, bool, const std::function &target) { - target(CycleFetchPCThrowaway); // IO - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. + target(CycleFetchPCThrowaway); // IO. target(OperationPrepareException); // Populates the data buffer; this skips a micro-op if // in emulation mode. - target(CyclePush); // PBR [skipped in emulation mode] - target(CyclePush); // PCH - target(CyclePush); // PCL - target(CyclePush); // P + target(CyclePush); // PBR [skipped in emulation mode]. + target(CyclePush); // PCH. + target(CyclePush); // PCL. + target(CyclePush); // P. - target(CycleFetchIncrementVector); // AAVL - target(CycleFetchVector); // AAVH + target(CycleFetchIncrementVector); // AAVL. + target(CycleFetchVector); // AAVH. target(OperationPerform); // Jumps to the vector address. } // 22b. Stack; s, PLx. static void stack_pull(AccessType, bool is8bit, const std::function &target) { - target(CycleFetchPCThrowaway); // IO - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. + target(CycleFetchPCThrowaway); // IO. if(!is8bit) target(CyclePull); // REG low. target(CyclePull); // REG [high]. @@ -623,7 +624,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { // 22c. Stack; s, PHx. static void stack_push(AccessType, bool is8bit, const std::function &target) { - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. target(OperationPerform); @@ -633,70 +634,70 @@ struct CPU::WDC65816::ProcessorStorageConstructor { // 22d. Stack; s, PEA. static void stack_pea(AccessType, bool, const std::function &target) { - target(CycleFetchIncrementPC); // AAL - target(CycleFetchIncrementPC); // AAH - target(CyclePush); // AAH - target(CyclePush); // AAL + target(CycleFetchIncrementPC); // AAL. + target(CycleFetchIncrementPC); // AAH. + target(CyclePush); // AAH. + target(CyclePush); // AAL. } // 22e. Stack; s, PEI. static void stack_pei(AccessType, bool, const std::function &target) { - target(CycleFetchIncrementPC); // DO + target(CycleFetchIncrementPC); // DO. target(OperationConstructDirect); - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. - target(CycleFetchIncrementData); // AAL - target(CycleFetchData); // AAH - target(CyclePush); // AAH - target(CyclePush); // AAL + target(CycleFetchIncrementData); // AAL. + target(CycleFetchData); // AAH. + target(CyclePush); // AAH. + target(CyclePush); // AAL. } // 22f. Stack; s, PER. static void stack_per(AccessType, bool, const std::function &target) { target(CycleFetchIncrementPC); // Offset low. target(CycleFetchIncrementPC); // Offset high. - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. target(OperationConstructPER); - target(CyclePush); // AAH - target(CyclePush); // AAL + target(CyclePush); // AAH. + target(CyclePush); // AAL. } // 22g. Stack; s, RTI. static void stack_rti(AccessType, bool, const std::function &target) { - target(CycleFetchPCThrowaway); // IO - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. + target(CycleFetchPCThrowaway); // IO. - target(CyclePull); // P - target(CyclePull); // New PCL - target(CyclePull); // New PCH - target(CyclePullIfNotEmulation); // PBR + target(CyclePull); // P. + target(CyclePull); // New PCL. + target(CyclePull); // New PCH. + target(CyclePullIfNotEmulation); // PBR. target(OperationPerform); // [RTI] — to unpack the fields above. } // 22h. Stack; s, RTS. static void stack_rts(AccessType, bool, const std::function &target) { - target(CycleFetchPCThrowaway); // IO - target(CycleFetchPCThrowaway); // IO + target(CycleFetchPCThrowaway); // IO. + target(CycleFetchPCThrowaway); // IO. - target(CyclePull); // PCL - target(CyclePull); // PCH - target(CycleAccessStack); // IO + target(CyclePull); // PCL. + target(CyclePull); // PCH. + target(CycleAccessStack); // IO. target(OperationPerform); // [RTS] } // 22i. Stack; s, RTL. static void stack_rtl(AccessType, bool, const std::function &target) { - target(CycleFetchIncrementPC); // IO - target(CycleFetchIncrementPC); // IO + target(CycleFetchIncrementPC); // IO. + target(CycleFetchIncrementPC); // IO. - target(CyclePull); // New PCL - target(CyclePull); // New PCH - target(CyclePull); // New PBR + target(CyclePull); // New PCL. + target(CyclePull); // New PCH. + target(CyclePull); // New PBR. target(OperationPerform); // [JML, to perform the RTL] } @@ -708,21 +709,21 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(OperationPrepareException); // Populates the data buffer; this skips a micro-op if // in emulation mode. - target(CyclePush); // PBR [skipped in emulation mode] - target(CyclePush); // PCH - target(CyclePush); // PCL - target(CyclePush); // P + target(CyclePush); // PBR [skipped in emulation mode]. + target(CyclePush); // PCH. + target(CyclePush); // PCL. + target(CyclePush); // P. - target(CycleFetchIncrementVector); // AAVL - target(CycleFetchVector); // AAVH + target(CycleFetchIncrementVector); // AAVL. + target(CycleFetchVector); // AAVH. target(OperationPerform); // Jumps to the vector address. } // 23. Stack Relative; d, s. static void stack_relative(AccessType type, bool is8bit, const std::function &target) { - target(CycleFetchIncrementPC); // SO - target(CycleFetchPCThrowaway); // IO + target(CycleFetchIncrementPC); // SO. + target(CycleFetchPCThrowaway); // IO. target(OperationConstructStackRelative); read_write(type, is8bit, target); @@ -730,12 +731,12 @@ struct CPU::WDC65816::ProcessorStorageConstructor { // 24. Stack Relative Indirect Indexed (d, s), y. static void stack_relative_indexed_indirect(AccessType type, bool is8bit, const std::function &target) { - target(CycleFetchIncrementPC); // SO - target(CycleFetchPCThrowaway); // IO + target(CycleFetchIncrementPC); // SO. + target(CycleFetchPCThrowaway); // IO. target(OperationConstructStackRelative); - target(CycleFetchIncrementData); // AAL - target(CycleFetchData); // AAH + target(CycleFetchIncrementData); // AAL. + target(CycleFetchData); // AAH. target(CycleFetchDataThrowaway); // IO. target(OperationConstructStackRelativeIndexedIndirect);