From 15ee84b2eba7ba9130e48ae6633ccaa7ab8dd75a Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Thu, 7 Mar 2024 11:45:39 -0500 Subject: [PATCH] Fix MUL ambiguity. --- InstructionSets/ARM/OperationMapper.hpp | 14 ++++++++------ Machines/Acorn/Archimedes/Archimedes.cpp | 2 +- 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/InstructionSets/ARM/OperationMapper.hpp b/InstructionSets/ARM/OperationMapper.hpp index 8552ea7de..aff28dd93 100644 --- a/InstructionSets/ARM/OperationMapper.hpp +++ b/InstructionSets/ARM/OperationMapper.hpp @@ -408,13 +408,9 @@ struct OperationMapper { // page references are provided were more detailed versions of the // decoding are depicted. - // Data processing; cf. p.17. - if constexpr (((partial >> 26) & 0b11) == 0b00) { - scheduler.template perform(DataProcessing(instruction)); - return; - } - // Multiply and multiply-accumulate (MUL, MLA); cf. p.23. + // + // This usurps a potential data processing decoding, so needs priority. if constexpr (((partial >> 22) & 0b111'111) == 0b000'000) { // This implementation provides only eight bits baked into the template parameters so // an additional dynamic test is required to check whether this is really, really MUL or MLA. @@ -424,6 +420,12 @@ struct OperationMapper { } } + // Data processing; cf. p.17. + if constexpr (((partial >> 26) & 0b11) == 0b00) { + scheduler.template perform(DataProcessing(instruction)); + return; + } + // Single data transfer (LDR, STR); cf. p.25. if constexpr (((partial >> 26) & 0b11) == 0b01) { scheduler.template perform(SingleDataTransfer(instruction)); diff --git a/Machines/Acorn/Archimedes/Archimedes.cpp b/Machines/Acorn/Archimedes/Archimedes.cpp index 574dd008e..6bd1a2027 100644 --- a/Machines/Acorn/Archimedes/Archimedes.cpp +++ b/Machines/Acorn/Archimedes/Archimedes.cpp @@ -702,7 +702,7 @@ class ConcreteMachine: static bool log = false; if(log) { - logger.info().append("%08x: %08x [r14:%08x]", executor_.pc(), instruction, executor_.registers()[14]); + logger.info().append("%08x: %08x [r0:%08x]", executor_.pc(), instruction, executor_.registers()[0]); } InstructionSet::ARM::execute(instruction, executor_); }