mirror of
https://github.com/TomHarte/CLK.git
synced 2025-02-23 03:29:04 +00:00
Give autonomy to secondary slots.
This commit is contained in:
parent
68361913ee
commit
183cb519e7
@ -27,13 +27,13 @@ class ASCII16kbROMSlotHandler: public MemorySlotHandler {
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if(pc_is_outside_bios) {
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if(address == 0x6000) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x4000, 0x4000, 0x4000);
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slot_.map(value * 0x4000, 0x4000, 0x4000);
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break;
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case 0xe:
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if(pc_is_outside_bios) {
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if(address == 0x7000 || address == 0x77ff) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x4000, 0x8000, 0x4000);
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slot_.map(value * 0x4000, 0x8000, 0x4000);
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break;
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}
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}
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@ -27,25 +27,25 @@ class ASCII8kbROMSlotHandler: public MemorySlotHandler {
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if(pc_is_outside_bios) {
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if(address == 0x6000 || address == 0x60ff) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x2000, 0x4000, 0x2000);
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slot_.map(value * 0x2000, 0x4000, 0x2000);
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break;
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case 0xd:
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if(pc_is_outside_bios) {
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if(address == 0x6800 || address == 0x68ff) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x2000, 0x6000, 0x2000);
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slot_.map(value * 0x2000, 0x6000, 0x2000);
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break;
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case 0xe:
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if(pc_is_outside_bios) {
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if(address == 0x7000 || address == 0x70ff) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x2000, 0x8000, 0x2000);
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slot_.map(value * 0x2000, 0x8000, 0x2000);
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break;
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case 0xf:
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if(pc_is_outside_bios) {
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if(address == 0x7800 || address == 0x78ff) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x2000, 0xa000, 0x2000);
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slot_.map(value * 0x2000, 0xa000, 0x2000);
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break;
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}
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}
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@ -27,19 +27,19 @@ class KonamiROMSlotHandler: public MemorySlotHandler {
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if(pc_is_outside_bios) {
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if(address == 0x6000) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x2000, 0x6000, 0x2000);
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slot_.map(value * 0x2000, 0x6000, 0x2000);
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break;
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case 4:
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if(pc_is_outside_bios) {
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if(address == 0x8000) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x2000, 0x8000, 0x2000);
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slot_.map(value * 0x2000, 0x8000, 0x2000);
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break;
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case 5:
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if(pc_is_outside_bios) {
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if(address == 0xa000) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x2000, 0xa000, 0x2000);
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slot_.map(value * 0x2000, 0xa000, 0x2000);
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break;
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}
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}
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@ -29,13 +29,13 @@ class KonamiWithSCCROMSlotHandler: public MemorySlotHandler {
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if(pc_is_outside_bios) {
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if(address == 0x5000) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x2000, 0x4000, 0x2000);
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slot_.map(value * 0x2000, 0x4000, 0x2000);
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break;
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case 0x0e:
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if(pc_is_outside_bios) {
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if(address == 0x7000) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x2000, 0x6000, 0x2000);
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slot_.map(value * 0x2000, 0x6000, 0x2000);
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break;
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case 0x12:
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if(pc_is_outside_bios) {
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@ -43,10 +43,10 @@ class KonamiWithSCCROMSlotHandler: public MemorySlotHandler {
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}
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if((value&0x3f) == 0x3f) {
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scc_is_visible_ = true;
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slot_.unmap(0, 0x8000, 0x2000);
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slot_.unmap(0x8000, 0x2000);
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} else {
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scc_is_visible_ = false;
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slot_.map(0, value * 0x2000, 0x8000, 0x2000);
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slot_.map(value * 0x2000, 0x8000, 0x2000);
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}
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break;
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case 0x13:
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@ -61,7 +61,7 @@ class KonamiWithSCCROMSlotHandler: public MemorySlotHandler {
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if(pc_is_outside_bios) {
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if(address == 0xb000) confidence_counter_.add_hit(); else confidence_counter_.add_equivocal();
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}
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slot_.map(0, value * 0x2000, 0xa000, 0x2000);
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slot_.map(value * 0x2000, 0xa000, 0x2000);
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break;
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}
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}
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@ -146,11 +146,6 @@ class ConcreteMachine:
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public Activity::Source,
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public MSX::MemorySlotChangeHandler {
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private:
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static constexpr int RAMMemorySlot = 3;
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static constexpr int RAMMemorySubSlot = 0;
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static constexpr int ExtensionROMSubSlot = 1;
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// Provide 512kb of memory for an MSX 2; 64kb for an MSX 1. 'Slightly' arbitrary.
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static constexpr size_t RAMSize = model == Target::Model::MSX2 ? 512 * 1024 : 64 * 1024;
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@ -253,7 +248,7 @@ class ConcreteMachine:
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const auto regional_bios = roms.find(regional_bios_name);
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if(regional_bios != roms.end()) {
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regional_bios->second.resize(32768);
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memory_slots_[0].set_source(regional_bios->second);
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bios_slot().set_source(regional_bios->second);
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has_bios = true;
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}
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}
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@ -270,40 +265,33 @@ class ConcreteMachine:
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);
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bios[0x2c] = keyboard;
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memory_slots_[0].set_source(bios);
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bios_slot().set_source(bios);
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}
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memory_slots_[0].map(0, 0, 0, 32768);
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bios_slot().map(0, 0, 32768);
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ram_slot().resize_source(RAMSize);
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ram_slot().template map<MemorySlot::AccessType::ReadWrite>(0, 0, 65536);
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if constexpr (model == Target::Model::MSX2) {
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// If there's an extension ROM, add it as a subslot in the same slot as RAM.
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std::vector<uint8_t> ram_plus;
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ram_plus.resize(RAMSize);
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memory_slots_[3].supports_secondary_paging = true;
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const auto extension = roms.find(ROM::Name::MSX2Extension);
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std::copy(extension->second.begin(), extension->second.end(), std::back_inserter(ram_plus));
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memory_slots_[RAMMemorySlot].supports_secondary_paging = true;
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memory_slots_[RAMMemorySlot].set_source(ram_plus);
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memory_slots_[RAMMemorySlot].template map<MemorySlot::AccessType::ReadWrite>(RAMMemorySubSlot, 0, 0, 65536);
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memory_slots_[RAMMemorySlot].map(ExtensionROMSubSlot, RAMSize, 0, 32768);
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} else {
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memory_slots_[RAMMemorySlot].resize_source(65536);
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memory_slots_[RAMMemorySlot].template map<MemorySlot::AccessType::ReadWrite>(RAMMemorySubSlot, 0, 0, 65536);
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extension->second.resize(32768);
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extension_rom_slot().set_source(extension->second);
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extension_rom_slot().map(0, 0, 32768);
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}
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// Add a disk cartridge if any disks were supplied.
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if(target.has_disk_drive) {
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memory_slots_[2].handler = std::make_unique<DiskROM>(memory_slots_[2]);
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disk_primary().handler = std::make_unique<DiskROM>(disk_slot());
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std::vector<uint8_t> &dos = roms.find(ROM::Name::MSXDOS)->second;
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dos.resize(16384);
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memory_slots_[2].set_source(dos);
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disk_slot().set_source(dos);
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memory_slots_[2].map(0, 0, 0x4000, 0x2000);
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memory_slots_[2].unmap(0, 0x6000, 0x2000);
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disk_slot().map(0, 0x4000, 0x2000);
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disk_slot().unmap(0x6000, 0x2000);
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}
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// Insert the media.
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@ -348,15 +336,15 @@ class ConcreteMachine:
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float get_confidence() final {
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if(performed_unmapped_access_ || pc_zero_accesses_ > 1) return 0.0f;
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if(memory_slots_[1].handler) {
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return memory_slots_[1].handler->get_confidence();
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if(cartridge_primary().handler) {
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return cartridge_primary().handler->get_confidence();
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}
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return 0.5f;
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}
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std::string debug_type() final {
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if(memory_slots_[1].handler) {
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return "MSX:" + memory_slots_[1].handler->debug_type();
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if(cartridge_primary().handler) {
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return "MSX:" + cartridge_primary().handler->debug_type();
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}
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return "MSX";
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}
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@ -364,26 +352,26 @@ class ConcreteMachine:
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bool insert_media(const Analyser::Static::Media &media) final {
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if(!media.cartridges.empty()) {
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const auto &segment = media.cartridges.front()->get_segments().front();
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auto &slot = memory_slots_[1];
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auto &slot = cartridge_slot();
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slot.set_source(segment.data);
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slot.map(0, 0, uint16_t(segment.start_address), std::min(segment.data.size(), 65536 - segment.start_address));
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slot.map(0, uint16_t(segment.start_address), std::min(segment.data.size(), 65536 - segment.start_address));
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auto msx_cartridge = dynamic_cast<Analyser::Static::MSX::Cartridge *>(media.cartridges.front().get());
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if(msx_cartridge) {
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switch(msx_cartridge->type) {
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default: break;
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case Analyser::Static::MSX::Cartridge::Konami:
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slot.handler = std::make_unique<Cartridge::KonamiROMSlotHandler>(static_cast<MSX::MemorySlot &>(slot));
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cartridge_primary().handler = std::make_unique<Cartridge::KonamiROMSlotHandler>(static_cast<MSX::MemorySlot &>(slot));
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break;
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case Analyser::Static::MSX::Cartridge::KonamiWithSCC:
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slot.handler = std::make_unique<Cartridge::KonamiWithSCCROMSlotHandler>(static_cast<MSX::MemorySlot &>(slot), scc_);
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cartridge_primary().handler = std::make_unique<Cartridge::KonamiWithSCCROMSlotHandler>(static_cast<MSX::MemorySlot &>(slot), scc_);
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break;
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case Analyser::Static::MSX::Cartridge::ASCII8kb:
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slot.handler = std::make_unique<Cartridge::ASCII8kbROMSlotHandler>(static_cast<MSX::MemorySlot &>(slot));
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cartridge_primary().handler = std::make_unique<Cartridge::ASCII8kbROMSlotHandler>(static_cast<MSX::MemorySlot &>(slot));
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break;
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case Analyser::Static::MSX::Cartridge::ASCII16kb:
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slot.handler = std::make_unique<Cartridge::ASCII16kbROMSlotHandler>(static_cast<MSX::MemorySlot &>(slot));
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cartridge_primary().handler = std::make_unique<Cartridge::ASCII16kbROMSlotHandler>(static_cast<MSX::MemorySlot &>(slot));
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break;
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}
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}
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@ -394,11 +382,11 @@ class ConcreteMachine:
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}
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if(!media.disks.empty()) {
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DiskROM *disk_rom = get_disk_rom();
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if(disk_rom) {
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DiskROM *const handler = disk_handler();
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if(handler) {
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size_t drive = 0;
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for(auto &disk : media.disks) {
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disk_rom->set_disk(disk, drive);
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handler->set_disk(disk, drive);
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drive++;
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if(drive == 2) break;
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}
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@ -442,7 +430,7 @@ class ConcreteMachine:
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final_slot_ = &memory_slots_[primary >> 6];
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for(int c = 0; c < 8; c += 2) {
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const MemorySlot &slot = memory_slots_[primary & 3];
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const PrimarySlot &slot = memory_slots_[primary & 3];
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primary >>= 2;
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read_pointers_[c] = slot.read_pointer(c);
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@ -752,9 +740,9 @@ class ConcreteMachine:
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// MARK: - Activity::Source
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void set_activity_observer(Activity::Observer *observer) final {
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DiskROM *disk_rom = get_disk_rom();
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if(disk_rom) {
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disk_rom->set_activity_observer(observer);
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DiskROM *handler = disk_handler();
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if(handler) {
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handler->set_activity_observer(observer);
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}
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i8255_port_handler_.set_activity_observer(observer);
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}
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@ -765,12 +753,6 @@ class ConcreteMachine:
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}
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private:
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uint8_t *ram() {
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return memory_slots_[RAMMemorySlot].source().data();
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}
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DiskROM *get_disk_rom() {
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return dynamic_cast<DiskROM *>(memory_slots_[2].handler.get());
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}
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void update_audio() {
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speaker_.run_for(audio_queue_, time_since_ay_update_.divide_cycles(Cycles(2)));
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}
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@ -873,14 +855,15 @@ class ConcreteMachine:
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/// Optionally attaches non-default logic to any of the four things selectable
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/// via the primary slot register.
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struct MemorySlot: public MSX::MemorySlot {
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using MSX::MemorySlot::MemorySlot;
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struct PrimarySlot: public MSX::PrimarySlot {
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using MSX::PrimarySlot::PrimarySlot;
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HalfCycles cycles_since_update;
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/// Storage for a slot-specialised handler.
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std::unique_ptr<MemorySlotHandler> handler;
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};
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MemorySlot memory_slots_[4];
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MemorySlot *final_slot_ = nullptr;
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PrimarySlot memory_slots_[4];
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PrimarySlot *final_slot_ = nullptr;
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HalfCycles time_since_ay_update_;
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@ -896,7 +879,40 @@ class ConcreteMachine:
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Ricoh::RP5C01::RP5C01 clock_;
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int next_clock_register_ = 0;
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};
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//
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// Various helpers that dictate the slot arrangement used by this emulator.
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//
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MemorySlot &bios_slot() {
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return memory_slots_[0].subslot(0);
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}
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MemorySlot &ram_slot() {
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return memory_slots_[3].subslot(0);
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}
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MemorySlot &extension_rom_slot() {
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return memory_slots_[3].subslot(1);
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}
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MemorySlot &cartridge_slot() {
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return cartridge_primary().subslot(0);
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}
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MemorySlot &disk_slot() {
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return disk_primary().subslot(0);
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}
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PrimarySlot &cartridge_primary() {
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return memory_slots_[1];
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}
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PrimarySlot &disk_primary() {
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return memory_slots_[2];
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}
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uint8_t *ram() {
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return ram_slot().source().data();
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}
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DiskROM *disk_handler() {
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return dynamic_cast<DiskROM *>(disk_primary().handler.get());
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}};
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}
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@ -12,31 +12,40 @@
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using namespace MSX;
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PrimarySlot::PrimarySlot(MemorySlotChangeHandler &handler) :
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subslots_{handler, handler, handler, handler} {}
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MemorySlot::MemorySlot(MemorySlotChangeHandler &handler) : handler_(handler) {
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for(int subslot = 0; subslot < 4; subslot++) {
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for(int region = 0; region < 8; region++) {
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read_pointers_[subslot][region] = unmapped.data();
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write_pointers_[subslot][region] = scratch.data();
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}
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for(int region = 0; region < 8; region++) {
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read_pointers_[region] = unmapped.data();
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write_pointers_[region] = scratch.data();
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}
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}
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void MemorySlot::set_secondary_paging(uint8_t value) {
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void PrimarySlot::set_secondary_paging(uint8_t value) {
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secondary_paging_ = value;
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}
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uint8_t MemorySlot::secondary_paging() const {
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uint8_t PrimarySlot::secondary_paging() const {
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return secondary_paging_;
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}
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const uint8_t *MemorySlot::read_pointer(int segment) const {
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const uint8_t *PrimarySlot::read_pointer(int segment) const {
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const int subslot = (secondary_paging_ >> (segment & ~1)) & 3;
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return read_pointers_[subslot][segment];
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return subslots_[subslot].read_pointer(segment);
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}
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uint8_t *PrimarySlot::write_pointer(int segment) const {
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const int subslot = (secondary_paging_ >> (segment & ~1)) & 3;
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return subslots_[subslot].write_pointer(segment);
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}
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const uint8_t *MemorySlot::read_pointer(int segment) const {
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return read_pointers_[segment];
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}
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uint8_t *MemorySlot::write_pointer(int segment) const {
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const int subslot = (secondary_paging_ >> (segment & ~1)) & 3;
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return write_pointers_[subslot][segment];
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return write_pointers_[segment];
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}
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void MemorySlot::set_source(const std::vector<uint8_t> &source) {
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@ -56,7 +65,7 @@ const std::vector<uint8_t> &MemorySlot::source() const {
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}
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template <MSX::MemorySlot::AccessType type>
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void MemorySlot::map(int subslot, std::size_t source_address, uint16_t destination_address, std::size_t length) {
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void MemorySlot::map(std::size_t source_address, uint16_t destination_address, std::size_t length) {
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assert(!(destination_address & 8191));
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assert(!(length & 8191));
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assert(size_t(destination_address) + length <= 65536);
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@ -65,9 +74,9 @@ void MemorySlot::map(int subslot, std::size_t source_address, uint16_t destinati
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source_address %= source_.size();
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const int bank = int((destination_address >> 13) + c);
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read_pointers_[subslot][bank] = &source_[source_address];
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read_pointers_[bank] = &source_[source_address];
|
||||
if constexpr (type == AccessType::ReadWrite) {
|
||||
write_pointers_[subslot][bank] = read_pointers_[subslot][bank];
|
||||
write_pointers_[bank] = read_pointers_[bank];
|
||||
}
|
||||
|
||||
source_address += 8192;
|
||||
@ -76,17 +85,21 @@ void MemorySlot::map(int subslot, std::size_t source_address, uint16_t destinati
|
||||
handler_.did_page();
|
||||
}
|
||||
|
||||
void MemorySlot::unmap(int subslot, uint16_t destination_address, std::size_t length) {
|
||||
void MemorySlot::unmap(uint16_t destination_address, std::size_t length) {
|
||||
assert(!(destination_address & 8191));
|
||||
assert(!(length & 8191));
|
||||
assert(size_t(destination_address) + length <= 65536);
|
||||
|
||||
for(std::size_t c = 0; c < (length >> 13); ++c) {
|
||||
read_pointers_[subslot][(destination_address >> 13) + c] = nullptr;
|
||||
read_pointers_[(destination_address >> 13) + c] = nullptr;
|
||||
}
|
||||
|
||||
handler_.did_page();
|
||||
}
|
||||
|
||||
template void MemorySlot::map<MSX::MemorySlot::AccessType::Read>(int subslot, std::size_t source_address, uint16_t destination_address, std::size_t length);
|
||||
template void MemorySlot::map<MSX::MemorySlot::AccessType::ReadWrite>(int subslot, std::size_t source_address, uint16_t destination_address, std::size_t length);
|
||||
MemorySlot &PrimarySlot::subslot(int slot) {
|
||||
return subslots_[slot];
|
||||
}
|
||||
|
||||
template void MemorySlot::map<MSX::MemorySlot::AccessType::Read>(std::size_t source_address, uint16_t destination_address, std::size_t length);
|
||||
template void MemorySlot::map<MSX::MemorySlot::AccessType::ReadWrite>(std::size_t source_address, uint16_t destination_address, std::size_t length);
|
||||
|
@ -38,15 +38,6 @@ class MemorySlot {
|
||||
public:
|
||||
MemorySlot(MemorySlotChangeHandler &);
|
||||
|
||||
/// Attempts to write the argument as the secondary paging selection.
|
||||
void set_secondary_paging(uint8_t);
|
||||
|
||||
/// @returns The value most recently provided to @c set_secondary_paging.
|
||||
uint8_t secondary_paging() const;
|
||||
|
||||
/// Indicates whether this slot supports secondary paging.
|
||||
bool supports_secondary_paging = false;
|
||||
|
||||
/// @returns A pointer to the area of memory currently underneath @c address that
|
||||
/// should be read
|
||||
const uint8_t *read_pointer(int segment) const;
|
||||
@ -73,7 +64,6 @@ class MemorySlot {
|
||||
/// supplied to @c set_source to the region indicated by
|
||||
/// @c destination_address and @c length within @c subslot.
|
||||
template <AccessType type = AccessType::Read> void map(
|
||||
int subslot,
|
||||
std::size_t source_address,
|
||||
uint16_t destination_address,
|
||||
std::size_t length);
|
||||
@ -83,15 +73,13 @@ class MemorySlot {
|
||||
/// will be used to field accesses to that area, allowing for areas that are not
|
||||
/// backed by memory to be modelled.
|
||||
void unmap(
|
||||
int subslot,
|
||||
uint16_t destination_address,
|
||||
std::size_t length);
|
||||
|
||||
private:
|
||||
std::vector<uint8_t> source_;
|
||||
uint8_t *read_pointers_[4][8];
|
||||
uint8_t *write_pointers_[4][8];
|
||||
uint8_t secondary_paging_ = 0;
|
||||
uint8_t *read_pointers_[8];
|
||||
uint8_t *write_pointers_[8];
|
||||
|
||||
MemorySlotChangeHandler &handler_;
|
||||
|
||||
@ -100,6 +88,34 @@ class MemorySlot {
|
||||
inline static MemoryChunk scratch;
|
||||
};
|
||||
|
||||
class PrimarySlot {
|
||||
public:
|
||||
PrimarySlot(MemorySlotChangeHandler &);
|
||||
|
||||
/// @returns A pointer to the area of memory currently underneath @c address that
|
||||
/// should be read
|
||||
const uint8_t *read_pointer(int segment) const;
|
||||
|
||||
/// @returns A pointer to the area of memory currently underneath @c address.
|
||||
uint8_t *write_pointer(int segment) const;
|
||||
|
||||
/// Attempts to write the argument as the secondary paging selection.
|
||||
void set_secondary_paging(uint8_t);
|
||||
|
||||
/// @returns The value most recently provided to @c set_secondary_paging.
|
||||
uint8_t secondary_paging() const;
|
||||
|
||||
/// Indicates whether this slot supports secondary paging.
|
||||
bool supports_secondary_paging = false;
|
||||
|
||||
/// Provides the subslot at the specified index.
|
||||
MemorySlot &subslot(int);
|
||||
|
||||
private:
|
||||
MemorySlot subslots_[4];
|
||||
uint8_t secondary_paging_ = 0;
|
||||
};
|
||||
|
||||
class MemorySlotHandler {
|
||||
public:
|
||||
virtual ~MemorySlotHandler() {}
|
||||
|
Loading…
x
Reference in New Issue
Block a user