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Attempts to clock the disk controller.
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@ -15,6 +15,7 @@
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#include <algorithm>
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#include <algorithm>
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#include <cassert>
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#include <cassert>
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using namespace Amiga;
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using namespace Amiga;
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namespace {
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namespace {
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@ -43,6 +44,7 @@ Chipset::Chipset(MemoryMap &map, int input_clock_rate) :
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cia_b_handler_(disk_controller_),
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cia_b_handler_(disk_controller_),
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cia_a(cia_a_handler_),
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cia_a(cia_a_handler_),
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cia_b(cia_b_handler_) {
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cia_b(cia_b_handler_) {
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disk_controller_.set_clocking_hint_observer(this);
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}
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}
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Chipset::Changes Chipset::run_for(HalfCycles length) {
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Chipset::Changes Chipset::run_for(HalfCycles length) {
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@ -412,10 +414,19 @@ template <bool stop_on_cpu> Chipset::Changes Chipset::run(HalfCycles length) {
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cia_b.run_for(e_clocks);
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cia_b.run_for(e_clocks);
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}
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}
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// Propagate TOD updates to the CIAs, and feed their new interrupt
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// outputs back to here.
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cia_a.advance_tod(vsyncs);
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cia_a.advance_tod(vsyncs);
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cia_b.advance_tod(hsyncs);
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cia_b.advance_tod(hsyncs);
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set_cia_interrupts(cia_a.get_interrupt_line(), cia_b.get_interrupt_line());
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set_cia_interrupts(cia_a.get_interrupt_line(), cia_b.get_interrupt_line());
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// Update the disk controller, if any drives are active.
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if(!disk_controller_is_sleeping_) {
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disk_controller_.run_for(changes.duration.cycles());
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}
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// Record the interrupt level.
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// TODO: is this useful?
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changes.interrupt_level = interrupt_level_;
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changes.interrupt_level = interrupt_level_;
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return changes;
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return changes;
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}
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}
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@ -994,6 +1005,13 @@ uint8_t Chipset::CIABHandler::get_port_input(MOS::MOS6526::Port) {
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return 0xff;
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return 0xff;
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}
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}
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// MARK: - ClockingHintObserver.
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void Chipset::set_component_prefers_clocking(ClockingHint::Source *, ClockingHint::Preference preference) {
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disk_controller_is_sleeping_ = preference == ClockingHint::Preference::None;
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LOG("Disk controller is " << (disk_controller_is_sleeping_ ? "sleeping" : "awake"));
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}
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// MARK: - Disk Controller.
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// MARK: - Disk Controller.
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Chipset::DiskController::DiskController(Cycles clock_rate) :
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Chipset::DiskController::DiskController(Cycles clock_rate) :
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@ -13,6 +13,7 @@
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#include <cstdint>
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#include <cstdint>
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#include "../../Activity/Source.hpp"
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#include "../../Activity/Source.hpp"
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#include "../../ClockReceiver/ClockingHintSource.hpp"
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#include "../../Components/6526/6526.hpp"
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#include "../../Components/6526/6526.hpp"
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#include "../../Outputs/CRT/CRT.hpp"
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#include "../../Outputs/CRT/CRT.hpp"
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#include "../../Processors/68000/68000.hpp"
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#include "../../Processors/68000/68000.hpp"
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@ -59,7 +60,7 @@ enum class DMAFlag: uint16_t {
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BlitterBusy = 1 << 14,
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BlitterBusy = 1 << 14,
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};
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};
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class Chipset {
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class Chipset: private ClockingHint::Observer {
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public:
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public:
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Chipset(MemoryMap &memory_map, int input_clock_rate);
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Chipset(MemoryMap &memory_map, int input_clock_rate);
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@ -218,13 +219,17 @@ class Chipset {
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// MARK: - Disk drives.
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// MARK: - Disk drives.
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class DiskController: private Storage::Disk::Controller {
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class DiskController: public Storage::Disk::Controller {
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public:
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public:
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DiskController(Cycles clock_rate);
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DiskController(Cycles clock_rate);
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void set_mtr_sel_side_dir_step(uint8_t);
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void set_mtr_sel_side_dir_step(uint8_t);
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uint8_t get_rdy_trk0_wpro_chng();
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uint8_t get_rdy_trk0_wpro_chng();
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void run_for(Cycles duration) {
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Storage::Disk::Controller::run_for(duration);
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}
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private:
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private:
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void process_input_bit(int value) final;
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void process_input_bit(int value) final;
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void process_index_hole() final;
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void process_index_hole() final;
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@ -235,6 +240,8 @@ class Chipset {
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uint32_t previous_select_ = 0;
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uint32_t previous_select_ = 0;
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} disk_controller_;
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} disk_controller_;
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void set_component_prefers_clocking(ClockingHint::Source *, ClockingHint::Preference) final;
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bool disk_controller_is_sleeping_ = false;
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class DiskDMA: public DMADevice<1> {
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class DiskDMA: public DMADevice<1> {
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public:
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public:
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