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https://github.com/TomHarte/CLK.git
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@@ -241,7 +241,7 @@ void IWM::run_for(const Cycles cycles) {
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}
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// Activity otherwise depends on mode and motor state.
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auto integer_cycles = cycles.as_integral();
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auto integer_cycles = cycles.get();
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switch(shift_mode_) {
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case ShiftMode::Reading: {
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// Per the IWM patent, column 7, around line 35 onwards: "The expected time
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@@ -249,7 +249,7 @@ void IWM::run_for(const Cycles cycles) {
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// expected time since the data is not precisely spaced when read due to
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// variations in drive speed and other external factors". The error_margin
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// here implements the 'after' part of that contract.
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const auto error_margin = Cycles(bit_length_.as_integral() >> 1);
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const auto error_margin = Cycles(bit_length_.get() >> 1);
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if(drive_is_rotating_[active_drive_]) {
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while(integer_cycles--) {
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@@ -263,7 +263,7 @@ void IWM::run_for(const Cycles cycles) {
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} else {
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while(cycles_since_shift_ + integer_cycles >= bit_length_ + error_margin) {
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const auto run_length = bit_length_ + error_margin - cycles_since_shift_;
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integer_cycles -= run_length.as_integral();
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integer_cycles -= run_length.get();
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cycles_since_shift_ += run_length;
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propose_shift(0);
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}
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@@ -282,7 +282,7 @@ void IWM::run_for(const Cycles cycles) {
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}
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shift_register_ <<= 1;
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integer_cycles -= cycles_until_write.as_integral();
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integer_cycles -= cycles_until_write.get();
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cycles_since_shift_ = Cycles(0);
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--output_bits_remaining_;
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@@ -347,7 +347,7 @@ void IWM::select_shift_mode() {
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// If writing mode just began, set the drive into write mode and cue up the first output byte.
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if(old_shift_mode != ShiftMode::Writing && shift_mode_ == ShiftMode::Writing) {
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if(drives_[active_drive_]) {
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drives_[active_drive_]->begin_writing(Storage::Time(1, clock_rate_ / bit_length_.as_integral()), false, false);
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drives_[active_drive_]->begin_writing(Storage::Time(1, clock_rate_ / bit_length_.get()), false, false);
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}
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shift_register_ = next_output_;
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write_handshake_ |= 0x80 | 0x40;
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@@ -386,7 +386,7 @@ void IWM::propose_shift(const uint8_t bit) {
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// shift in a 1 and start a new window wherever the first found 1 was.
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//
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// If no 1s are found, shift in a 0 and don't alter expectations as to window placement.
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const auto error_margin = Cycles(bit_length_.as_integral() >> 1);
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const auto error_margin = Cycles(bit_length_.get() >> 1);
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if(bit && cycles_since_shift_ < error_margin) return;
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shift_register_ = uint8_t((shift_register_ << 1) | bit);
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