Completes the opcode map.

InstructionSets/M50740/Decoder.cpp

@@ -24,6 +24,7 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
 			return std::make_pair(1, Instruction());
 
 #define Map(opcode, operation, addressing_mode)	case opcode: instr_ = Instruction(Operation::operation, AddressingMode::addressing_mode); break
+
 		/* 0x00 – 0x0f */
 			Map(0x00, BRK, Implied);					Map(0x01, ORA, XIndirect);
 			Map(0x02, JSR, ZeroPageIndirect);			Map(0x03, BBS, Bit0AccumulatorRelative);
@@ -128,6 +129,110 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
 														Map(0x7d, ADC, AbsoluteX);
 			Map(0x7e, ROR, AbsoluteX);					Map(0x7f, CLB, Bit3ZeroPage);
 
+		/* 0x80 – 0x8f */
+			Map(0x80, BRA, Relative);					Map(0x81, STA, XIndirect);
+			Map(0x82, RRF, ZeroPage);					Map(0x83, BBS, Bit4AccumulatorRelative);
+
+			Map(0x84, STY, ZeroPage);					Map(0x85, STA, ZeroPage);
+			Map(0x86, STX, ZeroPage);					Map(0x87, BBS, Bit4ZeroPageRelative);
+
+			Map(0x88, DEY, Implied);
+			Map(0x8a, TXA, Implied);					Map(0x8b, SEB, Bit4Accumulator);
+
+			Map(0x8c, STY, Absolute);					Map(0x8d, STA, Absolute);
+			Map(0x8e, STX, Absolute);					Map(0x8f, SEB, Bit4ZeroPage);
+
+		/* 0x90 – 0x9f */
+			Map(0x90, BCC, Relative);					Map(0x91, STA, IndirectY);
+														Map(0x93, BBC, Bit4AccumulatorRelative);
+
+			Map(0x94, STY, ZeroPageX);					Map(0x95, STA, ZeroPageX);
+			Map(0x96, STX, ZeroPageX);					Map(0x97, BBC, Bit4ZeroPageRelative);
+
+			Map(0x98, TYA, Implied);					Map(0x99, STA, AbsoluteY);
+			Map(0x9a, TXS, AbsoluteY);					Map(0x9b, CLB, Bit4Accumulator);
+
+														Map(0x9d, ADC, AbsoluteX);
+														Map(0x9f, CLB, Bit4ZeroPage);
+
+		/* 0xa0 – 0xaf */
+			Map(0xa0, LDY, Immediate);					Map(0xa1, LDA, XIndirect);
+			Map(0xa2, LDX, Immediate);					Map(0xa3, BBS, Bit5AccumulatorRelative);
+
+			Map(0xa4, LDY, ZeroPage);					Map(0xa5, LDA, ZeroPage);
+			Map(0xa6, LDX, ZeroPage);					Map(0xa7, BBS, Bit5ZeroPageRelative);
+
+			Map(0xa8, TAY, Implied);					Map(0xa9, LDA, Immediate);
+			Map(0xaa, TAX, Implied);					Map(0xab, SEB, Bit5Accumulator);
+
+			Map(0xac, LDY, Absolute);					Map(0xad, LDA, Absolute);
+			Map(0xae, LDX, Absolute);					Map(0xaf, SEB, Bit5ZeroPage);
+
+		/* 0xb0 – 0xbf */
+			Map(0xb0, BCS, Relative);					Map(0xb1, STA, IndirectY);
+			Map(0xb2, JMP, ZeroPageIndirect);			Map(0xb3, BBC, Bit5AccumulatorRelative);
+
+			Map(0xb4, LDY, ZeroPageX);					Map(0xb5, LDA, ZeroPageX);
+			Map(0xb6, LDX, ZeroPageY);					Map(0xb7, BBC, Bit5ZeroPageRelative);
+
+			Map(0xb8, CLV, Implied);					Map(0xb9, LDA, AbsoluteY);
+			Map(0xba, TSX, AbsoluteY);					Map(0xbb, CLB, Bit5Accumulator);
+
+			Map(0xbc, LDY, AbsoluteX);					Map(0xbd, LDA, AbsoluteX);
+			Map(0xbe, LDX, AbsoluteY);					Map(0xbf, CLB, Bit5ZeroPage);
+
+		/* 0xc0 – 0xcf */
+			Map(0xc0, CPY, Immediate);					Map(0xc1, CMP, XIndirect);
+			Map(0xc2, SLW, Implied);					Map(0xc3, BBS, Bit6AccumulatorRelative);
+
+			Map(0xc4, CPY, ZeroPage);					Map(0xc5, CMP, ZeroPage);
+			Map(0xc6, DEC, ZeroPage);					Map(0xc7, BBS, Bit6ZeroPageRelative);
+
+			Map(0xc8, INY, Implied);					Map(0xc9, CMP, Immediate);
+			Map(0xca, DEX, Implied);					Map(0xcb, SEB, Bit6Accumulator);
+
+			Map(0xcc, CPY, Absolute);					Map(0xcd, CMP, Absolute);
+			Map(0xce, DEC, Absolute);					Map(0xcf, SEB, Bit6ZeroPage);
+
+		/* 0xd0 – 0xdf */
+			Map(0xd0, BNE, Relative);					Map(0xd1, CMP, IndirectY);
+														Map(0xd3, BBC, Bit6AccumulatorRelative);
+
+														Map(0xd5, CMP, ZeroPageX);
+			Map(0xd6, DEC, ZeroPageX);					Map(0xd7, BBC, Bit6ZeroPageRelative);
+
+			Map(0xd8, CLD, Implied);					Map(0xd9, CMP, AbsoluteY);
+														Map(0xdb, CLB, Bit6Accumulator);
+
+														Map(0xdd, CMP, AbsoluteX);
+			Map(0xde, DEC, AbsoluteX);					Map(0xdf, CLB, Bit6ZeroPage);
+
+		/* 0xe0 – 0xef */
+			Map(0xe0, CPX, Immediate);					Map(0xe1, SBC, XIndirect);
+			Map(0xe2, FST, Implied);					Map(0xe3, BBS, Bit7AccumulatorRelative);
+
+			Map(0xe4, CPX, ZeroPage);					Map(0xe5, SBC, ZeroPage);
+			Map(0xe6, INC, ZeroPage);					Map(0xe7, BBS, Bit7ZeroPageRelative);
+
+			Map(0xe8, INX, Implied);					Map(0xe9, SBC, Immediate);
+			Map(0xea, NOP, Implied);					Map(0xeb, SEB, Bit7Accumulator);
+
+			Map(0xec, CPX, Absolute);					Map(0xed, SBC, Absolute);
+			Map(0xee, INC, Absolute);					Map(0xef, SEB, Bit7ZeroPage);
+
+		/* 0xf0 – 0xff */
+			Map(0xf0, BEQ, Relative);					Map(0xf1, SBC, IndirectY);
+														Map(0xf3, BBC, Bit7AccumulatorRelative);
+
+														Map(0xf5, SBC, ZeroPageX);
+			Map(0xf6, INC, ZeroPageX);					Map(0xf7, BBC, Bit7ZeroPageRelative);
+
+			Map(0xf8, SED, Implied);					Map(0xf9, SBC, AbsoluteY);
+														Map(0xfb, CLB, Bit7Accumulator);
+
+														Map(0xfd, SBC, AbsoluteX);
+			Map(0xfe, INC, AbsoluteX);					Map(0xff, CLB, Bit7ZeroPage);
+
 #undef Map
 		}
 	}

InstructionSets/M50740/Instruction.hpp

@@ -33,7 +33,7 @@ enum class AddressingMode {
 	ImmediateZeroPage,
 
 	Bit0Accumulator,			Bit1Accumulator,			Bit2Accumulator,			Bit3Accumulator,
-	Bit4Accumulator,			Bit5Accumulator,			Bit6Accumulator,			Bit37ccumulator,
+	Bit4Accumulator,			Bit5Accumulator,			Bit6Accumulator,			Bit7Accumulator,
 
 	Bit0ZeroPage,				Bit1ZeroPage,				Bit2ZeroPage,				Bit3ZeroPage,
 	Bit4ZeroPage,				Bit5ZeroPage,				Bit6ZeroPage,				Bit7ZeroPage,
@@ -48,75 +48,24 @@ enum class AddressingMode {
 enum class Operation: uint8_t {
 	Invalid,
 
-	ADC,
+	ADC,	AND,	ASL,	BBC,
-	AND,
+	BBS,	BCC,	BCS,	BEQ,
-	ASL,
+	BIT,	BMI,	BNE,	BPL,
-	BBC,
+	BRA,	BRK,	BVC,	BVS,
-	BBS,
+	CLB,	CLC,	CLD,	CLI,
-	BCC,
+	CLT,	CLV,	CMP,	COM,
-	BCS,
+	CPX,	CPY,	DEC,	DEX,
-	BEQ,
+	DEY,	EOR,	FST,	INC,
-	BIT,
+	INX,	INY,	JMP,	JSR,
-	BMI,
+	LDA,	LDM,	LDX,	LDY,
-	BNE,
+	LSR,	NOP,	ORA,	PHA,
-	BPL,
+	PHP,	PLA,	PLP,	ROL,
-	BRA,
+	ROR,	RRF,	RTI,	RTS,
-	BRK,
+	SBC,	SEB,	SEC,	SED,
-	BVC,
+	SEI,	SET,	SLW,	STA,
-	BVS,
+	STP,	STX,	STY,	TAX,
-	CLB,
+	TAY,	TST,	TSX,	TXA,
-	CLC,
+	TXS,	TYA
-	CLD,
-	CLI,
-	CLT,
-	CLV,
-	CMP,
-	COM,
-	CPX,
-	CPY,
-	DEC,
-	DEX,
-	DEY,
-	EOR,
-	FST,
-	INC,
-	INX,
-	INY,
-	JMP,
-	JSR,
-	LDA,
-	LDM,
-	LDX,
-	LDY,
-	LSR,
-	NOP,
-	ORA,
-	PHA,
-	PHP,
-	PLA,
-	PLP,
-	ROL,
-	ROR,
-	RRF,
-	RTI,
-	RTS,
-	SBC,
-	SEB,
-	SEC,
-	SED,
-	SEI,
-	SET,
-	SLW,
-	STA,
-	STP,
-	STX,
-	STY,
-	TAX,
-	TAY,
-	TST,
-	TSX,
-	TXS,
-	TYA
 };
 
 struct Instruction {