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Completes the opcode map.
This commit is contained in:
Thomas Harte
parent
f667dd223f
commit
1acb8c3c42
@ -24,7 +24,8 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
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return std::make_pair(1, Instruction());
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#define Map(opcode, operation, addressing_mode) case opcode: instr_ = Instruction(Operation::operation, AddressingMode::addressing_mode); break
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/* 0x00 – 0x0f */
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/* 0x00 – 0x0f */
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Map(0x00, BRK, Implied); Map(0x01, ORA, XIndirect);
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Map(0x02, JSR, ZeroPageIndirect); Map(0x03, BBS, Bit0AccumulatorRelative);
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@ -37,7 +38,7 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
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Map(0x0d, ORA, Absolute);
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Map(0x0e, ASL, Absolute); Map(0x0f, SEB, Bit0ZeroPage);
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/* 0x10 – 0x1f */
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/* 0x10 – 0x1f */
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Map(0x10, BPL, Relative); Map(0x11, ORA, IndirectY);
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Map(0x12, CLT, Implied); Map(0x13, BBC, Bit0AccumulatorRelative);
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@ -50,7 +51,7 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
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Map(0x1d, ORA, AbsoluteX);
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Map(0x1e, ASL, AbsoluteX); Map(0x1f, CLB, Bit0ZeroPage);
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/* 0x20 – 0x2f */
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/* 0x20 – 0x2f */
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Map(0x20, JSR, Absolute); Map(0x21, AND, XIndirect);
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Map(0x22, JSR, SpecialPage); Map(0x23, BBS, Bit1AccumulatorRelative);
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@ -63,7 +64,7 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
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Map(0x2c, BIT, Absolute); Map(0x2d, AND, Absolute);
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Map(0x2e, ROL, Absolute); Map(0x2f, SEB, Bit1ZeroPage);
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/* 0x30 – 0x3f */
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/* 0x30 – 0x3f */
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Map(0x30, BMI, Relative); Map(0x31, AND, IndirectY);
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Map(0x32, SET, Implied); Map(0x33, BBC, Bit1AccumulatorRelative);
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@ -76,7 +77,7 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
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Map(0x3c, LDM, ImmediateZeroPage); Map(0x3d, AND, AbsoluteX);
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Map(0x3e, ROL, AbsoluteX); Map(0x3f, CLB, Bit1ZeroPage);
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/* 0x40 – 0x4f */
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/* 0x40 – 0x4f */
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Map(0x40, RTI, Implied); Map(0x41, EOR, XIndirect);
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Map(0x42, STP, Implied); Map(0x43, BBS, Bit2AccumulatorRelative);
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@ -89,7 +90,7 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
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Map(0x4c, JMP, Absolute); Map(0x4d, EOR, Absolute);
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Map(0x4e, LSR, Absolute); Map(0x4f, SEB, Bit2ZeroPage);
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/* 0x50 – 0x5f */
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/* 0x50 – 0x5f */
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Map(0x50, BVC, Relative); Map(0x51, EOR, IndirectY);
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Map(0x53, BBC, Bit2AccumulatorRelative);
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@ -102,7 +103,7 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
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Map(0x5d, EOR, AbsoluteX);
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Map(0x5e, LSR, AbsoluteX); Map(0x5f, CLB, Bit2ZeroPage);
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/* 0x60 – 0x6f */
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/* 0x60 – 0x6f */
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Map(0x60, RTS, Implied); Map(0x61, ADC, XIndirect);
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Map(0x63, BBS, Bit3AccumulatorRelative);
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@ -115,7 +116,7 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
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Map(0x6c, JMP, AbsoluteIndirect); Map(0x6d, ADC, Absolute);
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Map(0x6e, ROR, Absolute); Map(0x6f, SEB, Bit3ZeroPage);
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/* 0x70 – 0x7f */
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/* 0x70 – 0x7f */
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Map(0x70, BVS, Relative); Map(0x71, ADC, IndirectY);
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Map(0x73, BBC, Bit3AccumulatorRelative);
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@ -128,6 +129,110 @@ std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_
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Map(0x7d, ADC, AbsoluteX);
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Map(0x7e, ROR, AbsoluteX); Map(0x7f, CLB, Bit3ZeroPage);
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/* 0x80 – 0x8f */
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Map(0x80, BRA, Relative); Map(0x81, STA, XIndirect);
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Map(0x82, RRF, ZeroPage); Map(0x83, BBS, Bit4AccumulatorRelative);
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Map(0x84, STY, ZeroPage); Map(0x85, STA, ZeroPage);
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Map(0x86, STX, ZeroPage); Map(0x87, BBS, Bit4ZeroPageRelative);
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Map(0x88, DEY, Implied);
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Map(0x8a, TXA, Implied); Map(0x8b, SEB, Bit4Accumulator);
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Map(0x8c, STY, Absolute); Map(0x8d, STA, Absolute);
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Map(0x8e, STX, Absolute); Map(0x8f, SEB, Bit4ZeroPage);
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/* 0x90 – 0x9f */
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Map(0x90, BCC, Relative); Map(0x91, STA, IndirectY);
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Map(0x93, BBC, Bit4AccumulatorRelative);
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Map(0x94, STY, ZeroPageX); Map(0x95, STA, ZeroPageX);
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Map(0x96, STX, ZeroPageX); Map(0x97, BBC, Bit4ZeroPageRelative);
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Map(0x98, TYA, Implied); Map(0x99, STA, AbsoluteY);
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Map(0x9a, TXS, AbsoluteY); Map(0x9b, CLB, Bit4Accumulator);
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Map(0x9d, ADC, AbsoluteX);
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Map(0x9f, CLB, Bit4ZeroPage);
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/* 0xa0 – 0xaf */
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Map(0xa0, LDY, Immediate); Map(0xa1, LDA, XIndirect);
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Map(0xa2, LDX, Immediate); Map(0xa3, BBS, Bit5AccumulatorRelative);
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Map(0xa4, LDY, ZeroPage); Map(0xa5, LDA, ZeroPage);
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Map(0xa6, LDX, ZeroPage); Map(0xa7, BBS, Bit5ZeroPageRelative);
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Map(0xa8, TAY, Implied); Map(0xa9, LDA, Immediate);
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Map(0xaa, TAX, Implied); Map(0xab, SEB, Bit5Accumulator);
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Map(0xac, LDY, Absolute); Map(0xad, LDA, Absolute);
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Map(0xae, LDX, Absolute); Map(0xaf, SEB, Bit5ZeroPage);
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/* 0xb0 – 0xbf */
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Map(0xb0, BCS, Relative); Map(0xb1, STA, IndirectY);
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Map(0xb2, JMP, ZeroPageIndirect); Map(0xb3, BBC, Bit5AccumulatorRelative);
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Map(0xb4, LDY, ZeroPageX); Map(0xb5, LDA, ZeroPageX);
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Map(0xb6, LDX, ZeroPageY); Map(0xb7, BBC, Bit5ZeroPageRelative);
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Map(0xb8, CLV, Implied); Map(0xb9, LDA, AbsoluteY);
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Map(0xba, TSX, AbsoluteY); Map(0xbb, CLB, Bit5Accumulator);
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Map(0xbc, LDY, AbsoluteX); Map(0xbd, LDA, AbsoluteX);
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Map(0xbe, LDX, AbsoluteY); Map(0xbf, CLB, Bit5ZeroPage);
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/* 0xc0 – 0xcf */
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Map(0xc0, CPY, Immediate); Map(0xc1, CMP, XIndirect);
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Map(0xc2, SLW, Implied); Map(0xc3, BBS, Bit6AccumulatorRelative);
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Map(0xc4, CPY, ZeroPage); Map(0xc5, CMP, ZeroPage);
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Map(0xc6, DEC, ZeroPage); Map(0xc7, BBS, Bit6ZeroPageRelative);
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Map(0xc8, INY, Implied); Map(0xc9, CMP, Immediate);
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Map(0xca, DEX, Implied); Map(0xcb, SEB, Bit6Accumulator);
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Map(0xcc, CPY, Absolute); Map(0xcd, CMP, Absolute);
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Map(0xce, DEC, Absolute); Map(0xcf, SEB, Bit6ZeroPage);
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/* 0xd0 – 0xdf */
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Map(0xd0, BNE, Relative); Map(0xd1, CMP, IndirectY);
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Map(0xd3, BBC, Bit6AccumulatorRelative);
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Map(0xd5, CMP, ZeroPageX);
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Map(0xd6, DEC, ZeroPageX); Map(0xd7, BBC, Bit6ZeroPageRelative);
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Map(0xd8, CLD, Implied); Map(0xd9, CMP, AbsoluteY);
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Map(0xdb, CLB, Bit6Accumulator);
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Map(0xdd, CMP, AbsoluteX);
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Map(0xde, DEC, AbsoluteX); Map(0xdf, CLB, Bit6ZeroPage);
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/* 0xe0 – 0xef */
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Map(0xe0, CPX, Immediate); Map(0xe1, SBC, XIndirect);
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Map(0xe2, FST, Implied); Map(0xe3, BBS, Bit7AccumulatorRelative);
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Map(0xe4, CPX, ZeroPage); Map(0xe5, SBC, ZeroPage);
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Map(0xe6, INC, ZeroPage); Map(0xe7, BBS, Bit7ZeroPageRelative);
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Map(0xe8, INX, Implied); Map(0xe9, SBC, Immediate);
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Map(0xea, NOP, Implied); Map(0xeb, SEB, Bit7Accumulator);
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Map(0xec, CPX, Absolute); Map(0xed, SBC, Absolute);
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Map(0xee, INC, Absolute); Map(0xef, SEB, Bit7ZeroPage);
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/* 0xf0 – 0xff */
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Map(0xf0, BEQ, Relative); Map(0xf1, SBC, IndirectY);
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Map(0xf3, BBC, Bit7AccumulatorRelative);
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Map(0xf5, SBC, ZeroPageX);
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Map(0xf6, INC, ZeroPageX); Map(0xf7, BBC, Bit7ZeroPageRelative);
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Map(0xf8, SED, Implied); Map(0xf9, SBC, AbsoluteY);
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Map(0xfb, CLB, Bit7Accumulator);
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Map(0xfd, SBC, AbsoluteX);
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Map(0xfe, INC, AbsoluteX); Map(0xff, CLB, Bit7ZeroPage);
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#undef Map
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}
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}
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@ -33,7 +33,7 @@ enum class AddressingMode {
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ImmediateZeroPage,
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Bit0Accumulator, Bit1Accumulator, Bit2Accumulator, Bit3Accumulator,
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Bit4Accumulator, Bit5Accumulator, Bit6Accumulator, Bit37ccumulator,
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Bit4Accumulator, Bit5Accumulator, Bit6Accumulator, Bit7Accumulator,
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Bit0ZeroPage, Bit1ZeroPage, Bit2ZeroPage, Bit3ZeroPage,
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Bit4ZeroPage, Bit5ZeroPage, Bit6ZeroPage, Bit7ZeroPage,
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@ -48,75 +48,24 @@ enum class AddressingMode {
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enum class Operation: uint8_t {
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Invalid,
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ADC,
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AND,
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ASL,
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BBC,
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BBS,
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BCC,
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BCS,
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BEQ,
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BIT,
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BMI,
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BNE,
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BPL,
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BRA,
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BRK,
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BVC,
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BVS,
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CLB,
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CLC,
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CLD,
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CLI,
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CLT,
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CLV,
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CMP,
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COM,
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CPX,
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CPY,
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DEC,
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DEX,
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DEY,
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EOR,
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FST,
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INC,
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INX,
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INY,
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JMP,
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JSR,
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LDA,
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LDM,
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LDX,
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LDY,
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LSR,
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NOP,
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ORA,
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PHA,
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PHP,
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PLA,
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PLP,
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ROL,
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ROR,
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RRF,
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RTI,
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RTS,
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SBC,
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SEB,
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SEC,
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SED,
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SEI,
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SET,
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SLW,
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STA,
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STP,
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STX,
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STY,
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TAX,
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TAY,
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TST,
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TSX,
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TXS,
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TYA
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ADC, AND, ASL, BBC,
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BBS, BCC, BCS, BEQ,
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BIT, BMI, BNE, BPL,
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BRA, BRK, BVC, BVS,
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CLB, CLC, CLD, CLI,
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CLT, CLV, CMP, COM,
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CPX, CPY, DEC, DEX,
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DEY, EOR, FST, INC,
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INX, INY, JMP, JSR,
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LDA, LDM, LDX, LDY,
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LSR, NOP, ORA, PHA,
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PHP, PLA, PLP, ROL,
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ROR, RRF, RTI, RTS,
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SBC, SEB, SEC, SED,
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SEI, SET, SLW, STA,
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STP, STX, STY, TAX,
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TAY, TST, TSX, TXA,
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TXS, TYA
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};
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struct Instruction {
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