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PHD and PLD should always be 16-bit; PLP 8-bit.
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@ -788,7 +788,7 @@ ProcessorStorage::ProcessorStorage() {
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/* 0x08 PHP s */ op(stack_push, PHP, AccessMode::Always8Bit);
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/* 0x09 ORA # */ op(immediate, ORA);
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/* 0x0a ASL A */ op(accumulator, ASL);
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/* 0x0b PHD s */ op(stack_push, PHD, AccessMode::Always8Bit);
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/* 0x0b PHD s */ op(stack_push, PHD, AccessMode::Always16Bit);
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/* 0x0c TSB a */ op(absolute_rmw, TSB);
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/* 0x0d ORA a */ op(absolute, ORA);
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/* 0x0e ASL a */ op(absolute_rmw, ASL);
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@ -819,10 +819,10 @@ ProcessorStorage::ProcessorStorage() {
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/* 0x25 AND d */ op(direct, AND);
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/* 0x26 ROL d */ op(direct_rmw, ROL);
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/* 0x27 AND [d] */ op(direct_indirect_long, AND);
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/* 0x28 PLP s */ op(stack_pull, PLP);
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/* 0x28 PLP s */ op(stack_pull, PLP, AccessMode::Always8Bit);
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/* 0x29 AND # */ op(immediate, AND);
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/* 0x2a ROL A */ op(accumulator, ROL);
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/* 0x2b PLD s */ op(stack_pull, PLD, AccessMode::Always8Bit);
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/* 0x2b PLD s */ op(stack_pull, PLD, AccessMode::Always16Bit);
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/* 0x2c BIT a */ op(absolute, BIT);
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/* 0x2d AND a */ op(absolute, AND);
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/* 0x2e ROL a */ op(absolute_rmw, ROL);
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