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Thomas Harte 2022-04-10 09:35:58 -04:00
parent 284440336d
commit 1b8d8f3a04
1 changed files with 15 additions and 15 deletions
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30
InstructionSets/PowerPC/Instruction.hpp
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@ -132,7 +132,7 @@ enum class Operation: uint8_t {
/// Rotate left then mask insert. /// Rotate left then mask insert.
/// rlmi rlmi. /// rlmi rlmi.
/// rA(), rS(), rB(), mb<uint32_t>(), me<uint32_t>() [rc()] /// rA(), rS(), rB(), mb(), me() [rc()]
/// Cf. rotate_mask() /// Cf. rotate_mask()
rlmix, rlmix,
@ -153,12 +153,12 @@ enum class Operation: uint8_t {
/// Shift left immediate with MQ. /// Shift left immediate with MQ.
/// sliq sliq. /// sliq sliq.
/// rA(), rS(), sh<uint32_t>() [rc()] /// rA(), rS(), sh() [rc()]
sliqx, sliqx,
/// Shift left long immediate with MQ. /// Shift left long immediate with MQ.
/// slliq slliq. /// slliq slliq.
/// rA(), rS(), sh<uint32_t>() [rc()] /// rA(), rS(), sh() [rc()]
slliqx, slliqx,
/// Shift left long with MQ. /// Shift left long with MQ.
@ -173,7 +173,7 @@ enum class Operation: uint8_t {
/// Shift right algebraic immediate with MQ. /// Shift right algebraic immediate with MQ.
/// sraiq sraiq. /// sraiq sraiq.
/// rA(), rS(), sh<uint32_t>() [rc()] /// rA(), rS(), sh() [rc()]
sraiqx, sraiqx,
/// Shift right algebraic with MQ. /// Shift right algebraic with MQ.
@ -198,12 +198,12 @@ enum class Operation: uint8_t {
/// Shift right immediate with MQ. /// Shift right immediate with MQ.
/// sriq sriq. /// sriq sriq.
/// rA(), rS(), sh<uint32_t>() [rc()] /// rA(), rS(), sh() [rc()]
sriqx, sriqx,
/// Shift right long immediate with MQ. /// Shift right long immediate with MQ.
/// srliq srliq. /// srliq srliq.
/// rA(), rS(), sh<uint32_t>() [rc()] /// rA(), rS(), sh() [rc()]
srliqx, srliqx,
/// Shift right long with MQ. /// Shift right long with MQ.
@ -867,19 +867,19 @@ enum class Operation: uint8_t {
/// Rotate left word immediate then mask insert. /// Rotate left word immediate then mask insert.
/// rlwimi rlwimi. /// rlwimi rlwimi.
/// rA(), rS(), sh<uint32_t>(), mb<uint32_t>(), me<uint32_t>() [rc()] /// rA(), rS(), sh(), mb(), me() [rc()]
/// Cf. rotate_mask() /// Cf. rotate_mask()
rlwimix, rlwimix,
/// Rotate left word immediate then AND with mask. /// Rotate left word immediate then AND with mask.
/// rlwinm rlwinm. /// rlwinm rlwinm.
/// rA(), rS(), sh<uint32_t>(), mb<uint32_t>(), me<uint32_t>() [rc()] /// rA(), rS(), sh(), mb(), me() [rc()]
/// Cf. rotate_mask() /// Cf. rotate_mask()
rlwinmx, rlwinmx,
/// Rotate left word then AND with mask /// Rotate left word then AND with mask
/// rlwimi rlwimi. /// rlwimi rlwimi.
/// rA(), rB(), rS(), mb<uint32_t>(), me<uint32_t>() [rc()] /// rA(), rB(), rS(), mb(), me() [rc()]
/// Cf. rotate_mask() /// Cf. rotate_mask()
rlwnmx, rlwnmx,
@ -899,7 +899,7 @@ enum class Operation: uint8_t {
/// Shift right algebraic word immediate. /// Shift right algebraic word immediate.
/// srawi srawi. /// srawi srawi.
/// rA(), rS(), sh<uint32_t>() [rc()] /// rA(), rS(), sh() [rc()]
srawix, srawix,
/// Shift right word. /// Shift right word.
@ -1428,7 +1428,7 @@ struct Instruction {
int16_t bd() const { return int16_t(opcode & 0xfffc); } int16_t bd() const { return int16_t(opcode & 0xfffc); }
/// Specifies the first 1 bit of a 32-bit mask for 32-bit rotate operations. /// Specifies the first 1 bit of a 32-bit mask for 32-bit rotate operations.
template <typename IntT> IntT mb() const { template <typename IntT = uint32_t> IntT mb() const {
if constexpr (sizeof(IntT) == 4) { if constexpr (sizeof(IntT) == 4) {
return (opcode >> 6) & 0x1f; return (opcode >> 6) & 0x1f;
} else { } else {
@ -1437,7 +1437,7 @@ struct Instruction {
} }
/// Specifies the first 1 bit of a 32/64-bit mask for rotate operations. /// Specifies the first 1 bit of a 32/64-bit mask for rotate operations.
/// Specify IntT as uint32_t for the 32-bit rotate instructions, uint64_t for the 64-bit. /// Specify IntT as uint32_t for the 32-bit rotate instructions, uint64_t for the 64-bit.
template <typename IntT> IntT me() const { template <typename IntT = uint32_t> IntT me() const {
if constexpr (sizeof(IntT) == 4) { if constexpr (sizeof(IntT) == 4) {
return (opcode >> 1) & 0x1f; return (opcode >> 1) & 0x1f;
} else { } else {
@ -1452,8 +1452,8 @@ struct Instruction {
/// mb == me+1 => set all bits /// mb == me+1 => set all bits
/// mb > me+1 => complement of set [me+1, mb-1] /// mb > me+1 => complement of set [me+1, mb-1]
uint32_t rotate_mask() const { uint32_t rotate_mask() const {
const auto mb_bit = mb<uint32_t>(); const auto mb_bit = mb();
const auto me_bit = me<uint32_t>(); const auto me_bit = me();
uint32_t result = (0xffff'ffff >> mb_bit) ^ (0x7fff'ffff >> me_bit); uint32_t result = (0xffff'ffff >> mb_bit) ^ (0x7fff'ffff >> me_bit);
return result ^ ((mb_bit < me_bit+1) ? 0 : 0xffff'ffff); return result ^ ((mb_bit < me_bit+1) ? 0 : 0xffff'ffff);
@ -1487,7 +1487,7 @@ struct Instruction {
/// Specifies a shift amount. Use IntT = uint32_t to get the shift value embedded in /// Specifies a shift amount. Use IntT = uint32_t to get the shift value embedded in
/// 32-bit instructions, uint64_t for 64-bit instructions. /// 32-bit instructions, uint64_t for 64-bit instructions.
template <typename IntT> uint32_t sh() const { template <typename IntT = uint32_t> uint32_t sh() const {
uint32_t sh = (opcode >> 11) & 0x1f; uint32_t sh = (opcode >> 11) & 0x1f;
if constexpr (sizeof(IntT) == 8) { if constexpr (sizeof(IntT) == 8) {
sh |= (opcode & 2) << 4; sh |= (opcode & 2) << 4;