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https://github.com/TomHarte/CLK.git
synced 2026-04-26 19:17:52 +00:00
Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate.
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@@ -11,20 +11,21 @@
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using namespace SCSI;
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Bus::Bus(HalfCycles clock_rate) {
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cycles_to_time_ = 1.0 / double(clock_rate.as_int());
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cycles_to_time_ = 1.0 / double(clock_rate.as_integral());
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// NB: note that the dispatch times below are **ORDERED**
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// from least to greatest. Each box should contain the number
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// of whole clock periods it will take to get the the first
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// discrete moment after the required delay interval has been met.
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dispatch_times_[0] = 1 + int(CableSkew / cycles_to_time_);
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dispatch_times_[1] = 1 + int(DeskewDelay / cycles_to_time_);
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dispatch_times_[2] = 1 + int(BusFreeDelay / cycles_to_time_);
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dispatch_times_[3] = 1 + int(BusSettleDelay / cycles_to_time_);
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dispatch_times_[4] = 1 + int(BusClearDelay / cycles_to_time_);
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dispatch_times_[5] = 1 + int(BusSetDelay / cycles_to_time_);
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dispatch_times_[6] = 1 + int(ArbitrationDelay / cycles_to_time_);
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dispatch_times_[7] = 1 + int(ResetHoldTime / cycles_to_time_);
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using IntType = Cycles::IntType;
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dispatch_times_[0] = 1 + IntType(CableSkew / cycles_to_time_);
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dispatch_times_[1] = 1 + IntType(DeskewDelay / cycles_to_time_);
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dispatch_times_[2] = 1 + IntType(BusFreeDelay / cycles_to_time_);
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dispatch_times_[3] = 1 + IntType(BusSettleDelay / cycles_to_time_);
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dispatch_times_[4] = 1 + IntType(BusClearDelay / cycles_to_time_);
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dispatch_times_[5] = 1 + IntType(BusSetDelay / cycles_to_time_);
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dispatch_times_[6] = 1 + IntType(ArbitrationDelay / cycles_to_time_);
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dispatch_times_[7] = 1 + IntType(ResetHoldTime / cycles_to_time_);
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}
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size_t Bus::add_device() {
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@@ -86,7 +87,7 @@ ClockingHint::Preference Bus::preferred_clocking() {
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}
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void Bus::update_observers() {
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const auto time_elapsed = double(time_in_state_.as_int()) * cycles_to_time_;
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const auto time_elapsed = double(time_in_state_.as_integral()) * cycles_to_time_;
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for(auto &observer: observers_) {
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observer->scsi_bus_did_change(this, state_, time_elapsed);
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}
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@@ -97,7 +98,7 @@ void Bus::run_for(HalfCycles time) {
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time_in_state_ += time;
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const auto old_index = dispatch_index_;
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const auto time_as_int = time_in_state_.as_int();
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const auto time_as_int = time_in_state_.as_integral();
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while(time_as_int >= dispatch_times_[dispatch_index_] && dispatch_index_ < dispatch_times_.size()) {
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++dispatch_index_;
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}
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