1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-26 08:49:37 +00:00

Vector reads signal VDA.

This commit is contained in:
Thomas Harte 2022-06-24 10:37:39 -04:00
parent a442077eac
commit 1c1ce625a7
2 changed files with 2 additions and 2 deletions

View File

@ -227,7 +227,7 @@ void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
case BusOperation::Read: read = vda = true; break;
case BusOperation::ReadOpcode: read = vda = vpa = true; break;
case BusOperation::ReadProgram: read = vpa = true; break;
case BusOperation::ReadVector: read = vpb = true; break;
case BusOperation::ReadVector: read = vpb = vda = true; break;
case BusOperation::InternalOperationRead: read = true; break;
case BusOperation::Write: vda = true; break;

View File

@ -77,7 +77,7 @@ enum BusOperation {
/// 65816: indicates that a read was signalled with VPA.
ReadProgram,
/// 6502: never signalled.
/// 65816: indicates that a read was signalled with VPB.
/// 65816: indicates that a read was signalled with VPB and VDA.
ReadVector,
/// 6502: never signalled.
/// 65816: indicates that a read was signalled, but neither VDA nor VPA were active.