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Corrects JSL and RTL.

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This commit is contained in:
Thomas Harte 2020-10-28 17:25:40 -04:00
parent 267dd59a59
commit 1e4679ae14
4 changed files with 11 additions and 4 deletions
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2
Machines/Apple/AppleIIgs/AppleIIgs.cpp
View File

@ -112,7 +112,7 @@ class ConcreteMachine:
}
}
printf("%06x [%02x]\n", address, *value);
printf("%06x [%02x] %c\n", address, *value, operation == CPU::WDC65816::BusOperation::ReadOpcode ? '*' : ' ');
Cycles duration = Cycles(5);

4
Processors/65816/Implementation/65816Implementation.hpp
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@ -626,6 +626,10 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
registers_.pc = uint16_t(data_buffer_.value);
break;
case RTL:
registers_.program_bank = data_buffer_.value & 0xff0000;
[[fallthrough]];
case RTS:
registers_.pc = uint16_t(data_buffer_.value + 1);
break;

6
Processors/65816/Implementation/65816Storage.cpp
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@ -298,7 +298,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
target(CyclePush); // PBR.
target(CycleAccessStack); // IO.
target(CycleFetchIncrementPC); // New PBR.
target(CycleFetchPC); // New PBR.
target(OperationConstructAbsolute); // Calculate data address.
target(OperationPerform); // [JSL]
@ -699,7 +699,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
target(CyclePull); // New PCH.
target(CyclePull); // New PBR.
target(OperationPerform); // [JML, to perform the RTL]
target(OperationPerform); // [RTL]
}
// 22j. Stack; s, BRK/COP.
@ -867,7 +867,7 @@ ProcessorStorage::ProcessorStorage() {
/* 0x68 PLA s */ op(stack_pull, LDA);
/* 0x69 ADC # */ op(immediate, ADC);
/* 0x6a ROR A */ op(accumulator, ROR);
/* 0x6b RTL s */ op(stack_rtl, JML);
/* 0x6b RTL s */ op(stack_rtl, RTL);
/* 0x6c JMP (a) */ op(absolute_indirect_jmp, JMPind);
/* 0x6d ADC a */ op(absolute, ADC);
/* 0x6e ROR a */ op(absolute_rmw, ROR);

3
Processors/65816/Implementation/65816Storage.hpp
View File

@ -220,6 +220,9 @@ enum Operation: uint8_t {
/// Loads the PC with the contents of the data buffer + 1.
RTS,
/// Loads the PC and program bank with the contents of the data buffer + 1.
RTL,
};
struct ProcessorStorageConstructor;