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https://github.com/TomHarte/CLK.git
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Made an attempt properly to deal with initial bus state.
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@ -52,7 +52,7 @@ class SerialPortVIA: public MOS::MOS6522<SerialPortVIA>, public MOS::MOS6522IRQD
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case ::Commodore::Serial::Line::Clock: _portB = (_portB & ~0x04) | (value ? 0 : 0x04); break;
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case ::Commodore::Serial::Line::Clock: _portB = (_portB & ~0x04) | (value ? 0 : 0x04); break;
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case ::Commodore::Serial::Line::Attention:
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case ::Commodore::Serial::Line::Attention:
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_portB = (_portB & ~0x80) | (value ? 0 : 0x80);
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_portB = (_portB & ~0x80) | (value ? 0 : 0x80);
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set_control_line_input(Port::B, Line::Two, !!(value&0x80));
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set_control_line_input(Port::B, Line::Two, value);
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break;
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break;
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}
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}
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}
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}
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@ -13,10 +13,13 @@ using namespace Commodore::Serial;
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void Bus::add_port(std::shared_ptr<Port> port)
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void Bus::add_port(std::shared_ptr<Port> port)
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{
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{
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_ports.push_back(port);
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_ports.push_back(port);
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for(int line = (int)ServiceRequest; line <= (int)Reset; line++)
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set_line_output_did_change((Line)line);
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}
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}
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void Bus::set_line_output_did_change(Line line)
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void Bus::set_line_output_did_change(Line line)
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{
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{
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// i.e. I believe these lines to be open collector, active low
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bool new_line_value = false;
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bool new_line_value = false;
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for(std::weak_ptr<Port> port : _ports)
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for(std::weak_ptr<Port> port : _ports)
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{
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{
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@ -27,6 +30,7 @@ void Bus::set_line_output_did_change(Line line)
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}
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}
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}
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}
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// post an update only if one occurred
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if(new_line_value != _line_values[line])
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if(new_line_value != _line_values[line])
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{
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{
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_line_values[line] = new_line_value;
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_line_values[line] = new_line_value;
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