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https://github.com/TomHarte/CLK.git
synced 2025-01-11 08:30:55 +00:00
Edge up very close to video waits.
I just need to implement back conversions that include marginal phase over in the JustInTimeActor.
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@ -225,26 +225,38 @@ template <bool has_disk_controller> class ConcreteMachine:
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using PartialMachineCycle = CPU::Z80::PartialMachineCycle;
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const uint16_t address = cycle.address ? *cycle.address : 0x0000;
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// TODO: possibly apply an access penalty.
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// Calculate an access penalty, if applicable.
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HalfCycles penalty;
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if(is_video_[address >> 14]) {
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// TODO.
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} else {
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switch(cycle.operation) {
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default: break;
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switch(cycle.operation) {
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default: break;
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case CPU::Z80::PartialMachineCycle::ReadStart:
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case CPU::Z80::PartialMachineCycle::WriteStart:
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if(wait_mode_ == WaitMode::OnAllAccesses) {
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penalty = HalfCycles(2);
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}
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break;
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// For non-video pauses, insert during the initial part of the bus cycle.
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case CPU::Z80::PartialMachineCycle::ReadStart:
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case CPU::Z80::PartialMachineCycle::WriteStart:
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if(!is_video_[address >> 14] && wait_mode_ == WaitMode::OnAllAccesses) {
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penalty = HalfCycles(2);
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}
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break;
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case CPU::Z80::PartialMachineCycle::ReadOpcodeStart:
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if(!is_video_[address >> 14] && wait_mode_ != WaitMode::None) {
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penalty = HalfCycles(2);
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}
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break;
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case CPU::Z80::PartialMachineCycle::ReadOpcodeStart:
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if(wait_mode_ != WaitMode::None) {
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penalty = HalfCycles(2);
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}
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break;
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// Video pauses: insert right at the end of the bus cycle.
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case CPU::Z80::PartialMachineCycle::ReadOpcode:
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case CPU::Z80::PartialMachineCycle::Read:
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case CPU::Z80::PartialMachineCycle::Write:
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if(is_video_[address >> 14]) {
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// TODO.
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}
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break;
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case CPU::Z80::PartialMachineCycle::Input:
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case CPU::Z80::PartialMachineCycle::Output: {
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if((address & 0xf0) == 0x80) {
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// TODO.
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}
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}
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}
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@ -92,7 +92,17 @@ uint8_t Nick::read([[maybe_unused]] uint16_t address) {
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return 0xff;
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}
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//int c;
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Cycles Nick::get_time_until_z80_slot() const {
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// Place Z80 accesses as the first six cycles in each sixteen-cycle window.
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// That models video accesses as being the final ten. Which has the net effect
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// of responding to the line parameter table interrupt flag as soon as it's
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// loaded.
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// i.e. 0 -> 0, 1 -> 15 ... 15 -> 1.
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return Cycles(
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15 ^ ((horizontal_counter_ + 15) & 15)
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);
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}
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void Nick::run_for(Cycles duration) {
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constexpr int line_length = 912;
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@ -455,7 +465,7 @@ void Nick::set_output_type(OutputType type, bool force_flush) {
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// MARK: - Sequence points.
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Cycles Nick::get_next_sequence_point() {
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Cycles Nick::get_next_sequence_point() const {
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// TODO: the below is incorrect; unit test and correct.
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// Changing to e.g. Cycles(1) reveals the relevant discrepancy.
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// return Cycles(1);
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@ -23,11 +23,12 @@ class Nick {
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uint8_t read(uint16_t address);
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void run_for(Cycles);
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Cycles get_time_until_z80_slot() const;
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void set_scan_target(Outputs::Display::ScanTarget *scan_target);
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Outputs::Display::ScanStatus get_scaled_scan_status() const;
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Cycles get_next_sequence_point();
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Cycles get_next_sequence_point() const;
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/*!
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@returns The current state of the interrupt line — @c true for active;
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