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Attempt proper EOP semantics; multisector reads.
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parent
c31ee968df
commit
208846a166
@ -15,6 +15,12 @@
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namespace PCCompatible {
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enum class AccessResult {
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Accepted,
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AcceptedWithEOP,
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NotAccepted,
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};
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class i8237 {
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public:
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void flip_flop_reset() {
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@ -149,32 +155,38 @@ class i8237 {
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//
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// Interface for reading/writing via DMA.
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//
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static constexpr auto NotAvailable = uint32_t(~0);
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/// Provides the next target address for @c channel if performing either a write (if @c is_write is @c true) or read (otherwise).
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///
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/// @returns Either a 16-bit address or @c NotAvailable if the requested channel isn't set up to perform a read or write at present.
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uint32_t access(size_t channel, bool is_write) {
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// if(channels_[channel].transfer_complete) {
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// return NotAvailable;
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// }
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/// @returns A combined address and @c AccessResult.
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std::pair<uint16_t, AccessResult> access(size_t channel, bool is_write) {
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if(is_write && channels_[channel].transfer != Channel::Transfer::Write) {
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return NotAvailable;
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return std::make_pair(0, AccessResult::NotAccepted);
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}
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if(!is_write && channels_[channel].transfer != Channel::Transfer::Read) {
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return NotAvailable;
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return std::make_pair(0, AccessResult::NotAccepted);
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}
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const auto address = channels_[channel].address.full;
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channels_[channel].address.full += channels_[channel].address_decrement ? -1 : 1;
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--channels_[channel].count.full;
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const bool was_complete = channels_[channel].transfer_complete;
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channels_[channel].transfer_complete = (channels_[channel].count.full == 0xffff);
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if(channels_[channel].transfer_complete) {
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// TODO: _something_ with mode.
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}
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return address;
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auto result = AccessResult::Accepted;
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if(!was_complete && channels_[channel].transfer_complete) {
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result = AccessResult::AcceptedWithEOP;
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}
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return std::make_pair(address, result);
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}
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void set_complete(size_t channel) {
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channels_[channel].transfer_complete = true;
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}
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private:
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@ -257,16 +269,15 @@ class DMA {
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}
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// TODO: this permits only 8-bit DMA. Fix that.
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bool write(size_t channel, uint8_t value) {
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auto address = controller.access(channel, true);
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if(address == i8237::NotAvailable) {
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return false;
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AccessResult write(size_t channel, uint8_t value) {
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auto access = controller.access(channel, true);
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if(access.second == AccessResult::NotAccepted) {
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return access.second;
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}
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address |= uint32_t(pages.channel_page(channel) << 16);
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const uint32_t address = uint32_t(pages.channel_page(channel) << 16) | access.first;
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*memory_->at(address) = value;
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return true;
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return access.second;
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}
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private:
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@ -119,58 +119,75 @@ class FloppyController {
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status_.begin(decoder_);
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// Search for a matching sector.
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const auto target = decoder_.geometry();
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bool found_sector = false;
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for(auto &pair: drives_[decoder_.target().drive].sectors(decoder_.target().head)) {
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if(
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(pair.second.address.track == target.cylinder) &&
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(pair.second.address.sector == target.sector) &&
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(pair.second.address.side == target.head) &&
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(pair.second.size == target.size)
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) {
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found_sector = true;
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bool wrote_in_full = true;
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auto target = decoder_.geometry();
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// bool found_sector = false;
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printf("Writing data beginning: ");
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for(int c = 0; c < 128 << target.size; c++) {
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if(c < 8) printf("%02x ", pair.second.samples[0].data()[c]);
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bool complete = false;
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while(!complete) {
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for(auto &pair: drives_[decoder_.target().drive].sectors(decoder_.target().head)) {
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if(
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(pair.second.address.track == target.cylinder) &&
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(pair.second.address.sector == target.sector) &&
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(pair.second.address.side == target.head) &&
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(pair.second.size == target.size)
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) {
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// found_sector = true;
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// bool wrote_in_full = true;
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if(!dma_.write(2, pair.second.samples[0].data()[c])) {
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printf("FDC: DMA not permitted\n");
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wrote_in_full = false;
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break;
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printf("Writing data beginning: ");
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for(int c = 0; c < 128 << target.size; c++) {
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if(c < 8) printf("%02x ", pair.second.samples[0].data()[c]);
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const auto access_result = dma_.write(2, pair.second.samples[0].data()[c]);
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switch(access_result) {
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default: break;
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case AccessResult::NotAccepted:
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printf("FDC: DMA not permitted\n");
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// wrote_in_full = false;
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break;
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case AccessResult::AcceptedWithEOP:
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complete = true;
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break;
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}
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if(access_result != AccessResult::Accepted) {
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break;
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}
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}
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}
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printf("\n");
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if(wrote_in_full) {
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results_.serialise(
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status_,
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decoder_.geometry().cylinder,
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decoder_.geometry().head,
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decoder_.geometry().sector,
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decoder_.geometry().size);
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} else {
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printf("FDC: didn't write in full\n");
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// TODO: Overrun, presumably?
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}
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++target.sector; // TODO: multitrack?
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printf("\n");
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break;
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// if(wrote_in_full) {
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// } else {
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// printf("FDC: didn't write in full\n");
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// // TODO: Overrun, presumably?
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// }
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break;
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}
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}
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}
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if(!found_sector) {
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printf("FDC: sector not found\n");
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// TODO: there's more than this, I think.
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status_.set(Intel::i8272::Status0::AbnormalTermination);
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results_.serialise(
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status_,
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decoder_.geometry().cylinder,
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decoder_.geometry().head,
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decoder_.geometry().sector,
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decoder_.geometry().size);
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}
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results_.serialise(
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status_,
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decoder_.geometry().cylinder,
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decoder_.geometry().head,
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decoder_.geometry().sector,
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decoder_.geometry().size);
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// if(!found_sector) {
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// printf("FDC: sector not found\n");
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// // TODO: there's more than this, I think.
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// status_.set(Intel::i8272::Status0::AbnormalTermination);
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// results_.serialise(
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// status_,
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// decoder_.geometry().cylinder,
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// decoder_.geometry().head,
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// decoder_.geometry().sector,
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// decoder_.geometry().size);
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// }
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// TODO: what if head has changed?
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drives_[decoder_.target().drive].status = decoder_.drive_head();
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drives_[decoder_.target().drive].raised_interrupt = true;
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pic_.apply_edge<6>(true);
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