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Add page 8.
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@ -113,8 +113,9 @@ template <Operation operation> Preinstruction Predecoder::decode(uint16_t instru
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}
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//
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// MARK: MULU, MULS.
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// MARK: MULU, MULS, DIVU, DIVS.
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//
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case Operation::DIVU: case Operation::DIVS:
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case Operation::MULU: case Operation::MULS:
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return Preinstruction(operation,
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ea_combined_mode, ea_register,
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@ -125,6 +126,27 @@ template <Operation operation> Preinstruction Predecoder::decode(uint16_t instru
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// MARK: - Page decoders.
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Preinstruction Predecoder::decode8(uint16_t instruction) {
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// 4-171 (p275)
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if((instruction & 0x1f0) == 0x100) return decode<Operation::SBCD>(instruction);
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// 4-150 (p254)
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switch(instruction & 0x0c0) {
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case 0x00: return decode<Operation::ORb>(instruction);
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case 0x40: return decode<Operation::ORw>(instruction);
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case 0x80: return decode<Operation::ORl>(instruction);
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default: break;
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}
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switch(instruction & 0x1c0) {
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case 0x0c0: return decode<Operation::DIVU>(instruction); // 4-97 (p201)
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case 0x1c0: return decode<Operation::DIVS>(instruction); // 4-93 (p197)
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default: break;
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}
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return Preinstruction();
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}
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Preinstruction Predecoder::decodeC(uint16_t instruction) {
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// 4-3 (p107)
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if((instruction & 0x1f0) == 0x100) return decode<Operation::ABCD>(instruction);
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@ -157,6 +179,7 @@ Preinstruction Predecoder::decodeC(uint16_t instruction) {
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Preinstruction Predecoder::decode(uint16_t instruction) {
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// Divide first based on line.
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switch(instruction & 0xf000) {
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case 0x8000: return decode8(instruction);
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case 0xc000: return decodeC(instruction);
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default: break;
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@ -26,6 +26,7 @@ class Predecoder {
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private:
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// Page by page decoders; each gets a bit ad hoc so
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// it is neater to separate them.
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Preinstruction decode8(uint16_t instruction);
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Preinstruction decodeC(uint16_t instruction);
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// Specific instruction decoders.
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