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Stubs onward to a second endless loop.
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@ -123,7 +123,24 @@ class ConcreteMachine:
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assert(false);
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break;
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// DMA.
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// Disk DMA.
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case Write(0x020): case Write(0x022): case Write(0x024):
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case Write(0x026):
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LOG("TODO: disk DMA; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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// Refresh.
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case Write(0x028):
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LOG("TODO (maybe): refresh; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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// Serial port.
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case Write(0x030):
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case Write(0x032):
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LOG("TODO: serial; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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// DMA management.
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case Write(0x096):
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ApplySetClear(dma_control_);
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break;
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@ -146,7 +163,6 @@ class ConcreteMachine:
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LOG("TODO: Bitplane control; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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case Write(0x108):
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case Write(0x10a):
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LOG("TODO: Bitplane modulo; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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@ -206,7 +222,7 @@ class ConcreteMachine:
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struct MemoryRegion {
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uint8_t *contents = nullptr;
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int read_write_mask = 0;
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unsigned int read_write_mask = 0;
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} regions_[64]; // i.e. top six bits are used as an index.
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MemoryMap() {
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@ -245,7 +261,7 @@ class ConcreteMachine:
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private:
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bool overlay_ = false;
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void set_region(int start, int end, uint8_t *base, int read_write_mask) {
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void set_region(int start, int end, uint8_t *base, unsigned int read_write_mask) {
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assert(!(start & ~0xfc'0000));
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assert(!((end - (1 << 18)) & ~0xfc'0000));
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@ -288,7 +304,7 @@ class ConcreteMachine:
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// b1: /LED [output]
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// b0: OVL [output]
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// TODO: provide an output for LED.
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LOG("TODO: LED -> " << (value & 2));
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map_.set_overlay(value & 1);
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}
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}
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