diff --git a/Components/9918/9918.cpp b/Components/9918/9918.cpp
index b3123e6a3..49d3cd450 100644
--- a/Components/9918/9918.cpp
+++ b/Components/9918/9918.cpp
@@ -442,14 +442,16 @@ void TMS9918::run_for(const HalfCycles cycles) {
 									const int column = (pixel_location + c) >> 3;
 									const int shift = 4 + (((pixel_location + c) & 7) ^ reverses[(master_system_.names[column].flags&2) >> 1]);
 									int value =
-									((
-										((master_system_.tile_graphics[column][0] << shift) & 0x800) |
-										((master_system_.tile_graphics[column][1] << (shift - 1)) & 0x400) |
-										((master_system_.tile_graphics[column][2] << (shift - 2)) & 0x200) |
-										((master_system_.tile_graphics[column][3] << (shift - 3)) & 0x100)
-									) >> 8) << 4;
+									(
+										(
+											((master_system_.tile_graphics[column][3] << shift) & 0x800) |
+											((master_system_.tile_graphics[column][2] << (shift - 1)) & 0x400) |
+											((master_system_.tile_graphics[column][1] << (shift - 2)) & 0x200) |
+											((master_system_.tile_graphics[column][0] << (shift - 3)) & 0x100)
+										) >> 8
+									) | ((master_system_.names[column].flags&0x08) << 1);
 
-									pixel_target_[c] = static_cast<uint32_t>((value << 24) | (value << 16) | (value << 8) | value);
+									pixel_target_[c] = master_system_.colour_ram[value];
 								}
 								pixel_target_ += pixels_left;
 							}
@@ -684,9 +686,18 @@ void TMS9918::set_register(int address, uint8_t value) {
 	if(!(address & 1)) {
 		write_phase_ = false;
 
-		// Enqueue the write to occur at the next available slot.
-		read_ahead_buffer_ = value;
-		queued_access_ = MemoryAccess::Write;
+		if(master_system_.cram_is_selected) {
+			master_system_.colour_ram[ram_pointer_ & 0x1f] = palette_pack(
+				static_cast<uint8_t>((value & 0x03) << 6),
+				static_cast<uint8_t>((value & 0x0c) << 4),
+				static_cast<uint8_t>((value & 0x30) << 2));
+			++ram_pointer_;
+			// TODO: insert a CRAM dot here.
+		} else {
+			// Enqueue the write to occur at the next available slot.
+			read_ahead_buffer_ = value;
+			queued_access_ = MemoryAccess::Write;
+		}
 
 		return;
 	}
@@ -707,7 +718,9 @@ void TMS9918::set_register(int address, uint8_t value) {
 			break;
 			case TI::TMS::SMSVDP:
 				if(value & 0x40) {
-					// TODO: CRAM.
+					ram_pointer_ = static_cast<uint16_t>(low_write_ | (value << 8));
+					master_system_.cram_is_selected = true;
+					queued_access_ = MemoryAccess::None;
 					return;
 				}
 				value &= 0xf;
@@ -787,6 +800,7 @@ void TMS9918::set_register(int address, uint8_t value) {
 			// Officially a 'read' set, so perform lookahead.
 			queued_access_ = MemoryAccess::Read;
 		}
+		master_system_.cram_is_selected = false;
 	}
 }
 
diff --git a/Components/9918/Implementation/9918Base.hpp b/Components/9918/Implementation/9918Base.hpp
index 7fe0c541d..772edb770 100644
--- a/Components/9918/Implementation/9918Base.hpp
+++ b/Components/9918/Implementation/9918Base.hpp
@@ -118,7 +118,7 @@ class Base {
 			bool shift_sprites_8px_left = false;
 			bool mode4_enable = false;
 
-			uint8_t colour_ram[32];
+			uint32_t colour_ram[32];
 
 			struct {
 				size_t offset;
@@ -129,6 +129,7 @@ class Base {
 
 			uint8_t horizontal_scroll = 0;
 			uint8_t vertical_scroll = 0;
+			bool cram_is_selected = false;
 		} master_system_;
 
 		enum class ScreenMode {