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Experiment with reads/writes earlier in the transaction.

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Thomas Harte 2024-10-15 12:10:36 -04:00
parent 947e890c59
commit 23f1308231
1 changed files with 181 additions and 175 deletions
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12
Machines/AmstradCPC/AmstradCPC.cpp
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@ -847,6 +847,9 @@ class ConcreteMachine:
clock_offset_ = (clock_offset_ + cycle.length) & HalfCycles(7);
z80_.set_wait_line(clock_offset_ >= HalfCycles(2));
// Float this out as a lambda to allow easy repositioning relative to the CPU activity;
// for now this is largely experimental.
const auto update_subsystems = [&] {
// Update the CRTC once every eight half cycles; aiming for half-cycle 4 as
// per the initial seed to the crtc_counter_, but any time in the final four
// will do as it's safe to conclude that nobody else has touched video RAM
@ -873,10 +876,10 @@ class ConcreteMachine:
// Update typing activity.
if(typer_) typer_->run_for(cycle.length);
};
// Stop now if no action is strictly required.
if(!cycle.is_terminal()) return HalfCycles(0);
// Continue only if action strictly required.
if(cycle.is_terminal()) {
uint16_t address = cycle.address ? *cycle.address : 0x0000;
switch(cycle.operation) {
case CPU::Z80::PartialMachineCycle::ReadOpcode:
@ -1061,6 +1064,9 @@ class ConcreteMachine:
default: break;
}
}
update_subsystems();
// Check whether the interrupt signal has changed the other way.
if(interrupt_timer_.request_has_changed()) z80_.set_interrupt_line(interrupt_timer_.get_request());