mirror of
https://github.com/TomHarte/CLK.git
synced 2024-11-22 12:33:29 +00:00
Minor clean-ups of my temporary cruft.
This commit is contained in:
Thomas Harte
parent
b72474f418
commit
24e68166c6
@ -42,6 +42,115 @@ namespace {
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constexpr int CLOCK_RATE = 14'318'180;
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class MemManagerChecker {
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int handle_total_ = 0;
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bool dump_bank(const Apple::IIgs::MemoryMap &memory, const char *name, uint32_t address, bool print, uint32_t must_contain = 0xffffffff) {
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const auto handles = memory.regions[memory.region_map[0xe117]].read;
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bool did_find = false;
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if(print) printf("%s: ", name);
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int max = 52;
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uint32_t last_visited = 0;
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// Seed address.
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address = uint32_t(handles[address] | (handles[address+1] << 8) | (handles[address+2] << 16) | (handles[address+3] << 24));
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while(true) {
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did_find |= address == must_contain;
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if(!address) {
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if(print) printf("nil\n");
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break;
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}
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++handle_total_;
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if(address < 0xe11700 || address > 0xe11aff) {
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if(print) printf("Out of bounds error with address = %06x!\n", address);
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return false;
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}
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if((address - 0xe11700)%20) {
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if(print) printf("Address alignment error!\n");
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return false;
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}
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const uint32_t previous = uint32_t(handles[address+12] | (handles[address+13] << 8) | (handles[address+14] << 16) | (handles[address+15] << 24));
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const uint32_t next = uint32_t(handles[address+16] | (handles[address+17] << 8) | (handles[address+18] << 16) | (handles[address+19] << 24));
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const uint32_t pointer = uint32_t(handles[address] | (handles[address+1] << 8) | (handles[address+2] << 16) | (handles[address+3] << 24));
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const uint32_t size = uint32_t(handles[address+8] | (handles[address+9] << 8) | (handles[address+10] << 16) | (handles[address+11] << 24));
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if(print) printf("%06x (<- %06x | %06x ->) [%06x:%06x] -> \n", address, previous, next, pointer, size);
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if(previous && ((previous < 0xe0'0000) || (previous > 0xe2'0000))) {
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if(print) printf("Out of bounds error with previous = %06x! [%d && (%d || %d)]\n", previous, bool(previous), previous < 0xe0'0000, previous > 0xe2'0000);
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return false;
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}
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if((previous || last_visited) && (previous != last_visited)) {
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if(print) printf("Back link error!\n");
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return false;
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}
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last_visited = address;
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address = next;
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--max;
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if(!max) {
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if(print) printf("Endless loop error!\n");
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return false;
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}
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}
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if(must_contain != 0xffffffff) {
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if(!did_find) {
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if(print) printf("%08x not found\n", must_contain);
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return false;
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}
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}
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return true;
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}
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bool has_seen_valid_memory_ = false;
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bool should_validate_ = false;
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public:
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bool validate_memory_manager(const Apple::IIgs::MemoryMap &memory, bool print) {
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const auto pointers = memory.regions[memory.region_map[0xe116]].read;
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constexpr uint32_t address = 0xe1162c;
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const uint32_t last_high_handle = uint32_t(pointers[address] | (pointers[address+1] << 8) | (pointers[address+2] << 16) | (pointers[address+3] << 24));
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// Check for initial state having been reached.
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// if(!has_seen_valid_memory_) {
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// if(pointers[0xe11624]) return true;
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// for(int c = 0xe1160c; c < 0xe1161c; c++) {
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// if(pointers[c]) return true;
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// }
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// has_seen_valid_memory_ = true;
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// }
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// Output.
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if(print) printf("\nNumber of banks: %d\n", pointers[0xe11624]);
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if(print) printf("Last high handle: %04x\n", last_high_handle);
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bool result = true;
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handle_total_ = 0;
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result &= dump_bank(memory, "Mem", 0xe11600, print, last_high_handle);
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result &= dump_bank(memory, "Purge", 0xe11604, print);
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result &= dump_bank(memory, "Free", 0xe11608, print);
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// TODO: and other checs?
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// result &= dump_bank("Bank 0", 0xe1160c);
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// result &= dump_bank("Bank 1", 0xe11610);
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// result &= dump_bank("Bank E0", 0xe11614);
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// result &= dump_bank("Bank E1", 0xe11618);
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// result &= dump_bank("Bank FF", 0xe1161c);
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if(print) printf("Total: %d\n", handle_total_);
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if(handle_total_ != 51) result &= false;
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return result;
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}
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};
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}
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namespace Apple {
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@ -147,6 +256,7 @@ class ConcreteMachine:
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// rom_[0x36403] = 0xab; // ECT_SEQ
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// rom_[0x36404] = 0x64;
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rom_[0xfc146f] = rom_[0xfc1470] = 0xea;
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size_t ram_size = 0;
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switch(target.memory_model) {
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@ -215,7 +325,6 @@ class ConcreteMachine:
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}
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Outputs::Speaker::Speaker *get_speaker() final {
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// return nullptr;
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return &speaker_;
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}
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@ -240,107 +349,6 @@ class ConcreteMachine:
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drives525_[1].set_activity_observer(observer, "Second 5.25\" Drive", true);
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}
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int handle_total_ = 0;
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bool dump_bank(const char *name, uint32_t address, bool print) {
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const auto handles = memory_.regions[memory_.region_map[0xe117]].read;
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if(print) printf("%s: ", name);
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int max = 52;
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uint32_t last_visited = 0;
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// Seed address.
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address = uint32_t(handles[address] | (handles[address+1] << 8) | (handles[address+2] << 16) | (handles[address+3] << 24));
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while(true) {
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if(!address) {
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if(print) printf("nil\n");
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break;
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}
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++handle_total_;
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if(address < 0xe11700 || address > 0xe11aff) {
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if(print) printf("Out of bounds error with address = %06x!\n", address);
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return false;
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}
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if((address - 0xe11700)%20) {
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if(print) printf("Address alignment error!\n");
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return false;
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}
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const uint32_t previous = uint32_t(handles[address+12] | (handles[address+13] << 8) | (handles[address+14] << 16) | (handles[address+15] << 24));
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const uint32_t next = uint32_t(handles[address+16] | (handles[address+17] << 8) | (handles[address+18] << 16) | (handles[address+19] << 24));
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const uint32_t pointer = uint32_t(handles[address] | (handles[address+1] << 8) | (handles[address+2] << 16) | (handles[address+3] << 24));
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const uint32_t size = uint32_t(handles[address+8] | (handles[address+9] << 8) | (handles[address+10] << 16) | (handles[address+11] << 24));
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if(print) printf("%06x (<- %06x | %06x ->) [%06x:%06x] -> \n", address, previous, next, pointer, size);
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if(previous && ((previous < 0xe0'0000) || (previous > 0xe2'0000))) {
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if(print) printf("Out of bounds error with previous = %06x! [%d && (%d || %d)]\n", previous, bool(previous), previous < 0xe0'0000, previous > 0xe2'0000);
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return false;
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}
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if((previous || last_visited) && (previous != last_visited)) {
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if(print) printf("Back link error!\n");
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return false;
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}
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last_visited = address;
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address = next;
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--max;
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if(!max) {
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if(print) printf("Endless loop error!\n");
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return false;
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}
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}
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return true;
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}
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bool has_seen_valid_memory_ = false;
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bool should_validate_ = false;
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bool validate_memory_manager(bool print) {
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const auto pointers = memory_.regions[memory_.region_map[0xe116]].read;
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// Check for initial state having been reached.
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// if(!has_seen_valid_memory_) {
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// if(pointers[0xe11624]) return true;
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// for(int c = 0xe1160c; c < 0xe1161c; c++) {
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// if(pointers[c]) return true;
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// }
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// has_seen_valid_memory_ = true;
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// }
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// Output.
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if(print) printf("\nNumber of banks: %d\n", pointers[0xe11624]);
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bool result = true;
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handle_total_ = 0;
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result &= dump_bank("Mem", 0xe11600, print);
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result &= dump_bank("Purge", 0xe11604, print);
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result &= dump_bank("Free", 0xe11608, print);
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// Check LastHighHandle
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const auto handles = memory_.regions[memory_.region_map[0xe116]].read;
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uint32_t address = 0xe1162c;
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address = uint32_t(handles[address] | (handles[address+1] << 8) | (handles[address+2] << 16) | (handles[address+3] << 24));
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if(print) printf("LastHighHandle: ");
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while(address) {
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if(print) printf("%06x ->", address);
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address = uint32_t(handles[address+12] | (handles[address+13] << 8) | (handles[address+14] << 16) | (handles[address+15] << 24));
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}
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if(print) printf("\n");
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// result &= dump_bank("Bank 0", 0xe1160c);
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// result &= dump_bank("Bank 1", 0xe11610);
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// result &= dump_bank("Bank E0", 0xe11614);
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// result &= dump_bank("Bank E1", 0xe11618);
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// result &= dump_bank("Bank FF", 0xe1161c);
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if(print) printf("Total: %d\n", handle_total_);
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if(handle_total_ != 51) result &= false;
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return result;
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}
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// MARK: BusHandler.
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uint64_t total = 0;
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forceinline Cycles perform_bus_operation(const CPU::WDC65816::BusOperation operation, const uint32_t address, uint8_t *const value) {
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@ -910,46 +918,18 @@ class ConcreteMachine:
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}
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}
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// if(operation == CPU::WDC65816::BusOperation::ReadOpcode) {
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// assert(address);
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//
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// if(address < 0xe2'0000 &&
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// address != 0x00f8c9 &&
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// address != 0xe11690 &&
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// address != 0xe11694 &&
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// address != 0xe1168c &&
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// address != 0xe10068 &&
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// !validate_memory_manager(false)) {
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// if(should_validate_) {
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// printf("@%llu\n", total);
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// validate_memory_manager(true);
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////// printf("!OH MY! [%06x]\n", address);
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////// printf("!OH MY! [%06x]\n", address);
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// }
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// should_validate_ |= address == 0xe101ad;
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// }
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// }
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if(total == 132222166 || total == 467891275 || total == 491026055) {
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validate_memory_manager(true);
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if(operation == CPU::WDC65816::BusOperation::ReadOpcode) {
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// if(total >= 92168628 && !validate_memory_manager(false) && address < 0xe10000) {
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// printf("@%llu\n", static_cast<unsigned long long>(total));
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// validate_memory_manager(true);
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// }
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// assert(address);
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}
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// if(operation == CPU::WDC65816::BusOperation::Write && address >= 0xe11700 && address < 0xe11b00) {
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// dump_memory_manager();
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// printf("%04x <- %02x [%llu]\n", address, *value, static_cast<unsigned long long>(total));
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// if(total == 132222166 || total == 467891275 || total == 491026055) {
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// validate_memory_manager(true);
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// }
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// if(address >= 0x00bc5d && address <= 0x00bc5f) {
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// printf("%06x %s %02x%s [%llu] [%p/%p]\n", address, isReadOperation(operation) ? "->" : "<-", *value,
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// operation == CPU::WDC65816::BusOperation::ReadOpcode ? " [*]" : "",
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// static_cast<unsigned long long>(total),
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// memory_.regions[memory_.region_map[0xe119]].read,
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// memory_.regions[memory_.region_map[0xe119]].write);
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// }
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// bool result = dump_bank(0, 0xe1160c);
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// result &= dump_bank(1, 0xe11610);
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// result &= dump_bank(0xe0, 0xe11614);
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// result &= dump_bank(0xe1, 0xe11618);
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// if(operation == CPU::WDC65816::BusOperation::Write && (
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// (address >= 0xe11700 && address <= 0xe11aff) ||
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@ -963,55 +943,18 @@ class ConcreteMachine:
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// }
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// }
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// if(operation == CPU::WDC65816::BusOperation::Write && (address >= 0xe11750 + 16 && address < 0xe11750 + 20)) {
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// printf("%06x <- %02x [%llu]\n", address, *value, static_cast<unsigned long long>(total));
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// }
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// if(memory_.regions[memory_.region_map[0x755b]].read[0x755b4d] == 0x7f) {
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// printf("%llu\n", static_cast<unsigned long long>(total));
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// }
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// if(operation == CPU::WDC65816::BusOperation::Write && address == 0x755b4d) {
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// printf("%04x <- %02x [%llu]\n", address, *value, static_cast<unsigned long long>(total));
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// }
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// log |= (total == 611808545);
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// log |= (total == 663201455);
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// log |= total == 502083045;
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// log |= total == 502070045;
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// log |= total == 497920695;
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// log |= total == 495795545;
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// log |= total == 342435845;
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// log |= total == 492330040;
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// 491037040
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// log |= (total > 491010040) && (operation == CPU::WDC65816::BusOperation::ReadOpcode) && (address < 0xe1'0000);
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// log &= !(total == 491037040);
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if(operation == CPU::WDC65816::BusOperation::ReadOpcode) {
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// log |= address == 0x01f1bd; // RTL goes to 01f1c1 (as 01f1c0 is on the stack).
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// log &= address != 0x01f1c1;
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// log |= address == 0xfc0fa6;
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// log &= address != 0xfc0fa8;
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// log |= address == 0xfc01ba;
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// log |= address == 0xfc10fd;
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// log &= address != 0xff4a73;
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// log = (address >= 0xff6cdc) && (address < 0xff6d43);
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// log = (address >= 0x00d300) && (address < 0x00d600);
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if(total > 482342960 && total < 482352960 && address == 0xe10000) {
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printf("entry: %llu\n", static_cast<unsigned long long>(total));
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}
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// log |= address == 0xfc144f;
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// log &= !((address < 0xfc144f) || (address >= 0xfc1490));
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// if(address == 0xfc02b1) {
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// dump_memory_manager();
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}
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// }
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// log &= !((operation == CPU::WDC65816::BusOperation::ReadOpcode) && ((address < 0xff6a2c) || (address >= 0xff6a9c)));
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// if(address == 0x00bca9 && operation == CPU::WDC65816::BusOperation::Write && !*value) {
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// printf("%06x <- %02x [%d]\n", address, *value, static_cast<unsigned long long>(total));
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// }
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// log |= (address == 0x755b4d);
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// }
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}
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if(log) {
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printf("%06x %s %02x [%s]", address, isReadOperation(operation) ? "->" : "<-", *value, (is_1Mhz || (speed_register_ & motor_flags_)) ? "1.0" : "2.8");
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@ -1032,17 +975,6 @@ class ConcreteMachine:
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}
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// Automatic test overrides.
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// if(operation == CPU::WDC65816::BusOperation::ReadOpcode) {
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// // SCC.
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// if(address == 0xff68d7) *value = 0x18; // CLC
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// if(address == 0xff68d8) *value = 0x6b; // RTL
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//
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// // Clock.
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// if(address == 0xff68d7) *value = 0x18; // CLC
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// if(address == 0xff68d8) *value = 0x6b; // RTL
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// }
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Cycles duration;
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// In preparation for this test: the top bit of speed_register_ has been inverted,
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@ -1116,7 +1048,7 @@ class ConcreteMachine:
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void update_interrupts() {
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// Update the interrupt line.
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// TODO: are there other interrupt sources?
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m65816_.set_irq_line(video_.last_valid()->get_interrupt_line() || sound_glu_.get_interrupt_line());
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// m65816_.set_irq_line(video_.last_valid()->get_interrupt_line() || sound_glu_.get_interrupt_line());
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}
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// MARK: - Input.
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