From 26bf66e3f86a960cf2555b2404ae0ec8e5df59a6 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Mon, 23 May 2022 10:09:46 -0400
Subject: [PATCH] Fix shifts and rolls.

---
 .../Clock SignalTests/68000ComparativeTests.mm   |  2 +-
 .../Implementation/68000Mk2Implementation.hpp    | 16 ++++++++--------
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm
index e5577c562..924734280 100644
--- a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm	
+++ b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm	
@@ -190,7 +190,7 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
 		@"tas.json",
 		@"tst.json",
 	]];
-	_testSet = [NSSet setWithArray:@[@"ASL/R e0d0"]];
+//	_testSet = [NSSet setWithArray:@[@"ASL/R e0d0"]];
 }
 
 - (void)testAll {
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
index 8f602e8d5..cacb11a2f 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
@@ -751,14 +751,14 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 				StdCASE(RTS, MoveToStateSpecific(RTS));
 
 #define ShiftGroup(suffix, state)								\
-				Duplicate(ASL##suffix, ASR##suffix);				\
-				Duplicate(LSL##suffix, ASR##suffix);				\
-				Duplicate(LSR##suffix, ASR##suffix);				\
-				Duplicate(ROL##suffix, ASR##suffix);				\
-				Duplicate(ROR##suffix, ASR##suffix);				\
-				Duplicate(ROXL##suffix, ASR##suffix);				\
-				Duplicate(ROXR##suffix, ASR##suffix);				\
-				StdCASE(ASR##suffix, post_ea_state_ = state );
+				Duplicate(ASL##suffix, ASR##suffix);			\
+				Duplicate(LSL##suffix, ASR##suffix);			\
+				Duplicate(LSR##suffix, ASR##suffix);			\
+				Duplicate(ROL##suffix, ASR##suffix);			\
+				Duplicate(ROR##suffix, ASR##suffix);			\
+				Duplicate(ROXL##suffix, ASR##suffix);			\
+				Duplicate(ROXR##suffix, ASR##suffix);			\
+				StdCASE(ASR##suffix, perform_state_ = state );
 
 				ShiftGroup(m, Perform_np)
 				ShiftGroup(b, Perform_idle_dyamic_Dn)