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Adds direct indirect long test, and thereby fixes addressing mode.

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Nine to go!
This commit is contained in:
Thomas Harte 2020-10-14 21:26:20 -04:00
parent 327ab81436
commit 27afb8f0a7
4 changed files with 36 additions and 4 deletions
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22
OSBindings/Mac/Clock SignalTests/65816AddressingTests.swift
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@ -280,8 +280,6 @@ class WDC65816AddressingTests: XCTestCase {
XCTAssertEqual(machine.value(for: .A), 0xcdab)
}
// TODO: all tests from this point downward.
func testDirectIndirectLong() {
// "If the D register is $FF00 and the m flag is 0, then for LDA [$FE], the
// address of the low byte of the pointer is $00FFFE, the address of the middle
@ -291,8 +289,28 @@ class WDC65816AddressingTests: XCTestCase {
// * $00FFFF contains $FF
// then LDA [$FE] loads the low byte of the data from address $12FFFF, and the
// high byte from $130000."
let machine = machine16()
machine.setValue(0xff00, for: .direct)
machine.setValue(0x12, forAddress: 0x0000)
machine.setValue(0xff, forAddress: 0xfffe)
machine.setValue(0xff, forAddress: 0xffff)
machine.setValue(0xab, forAddress: 0x12ffff)
machine.setValue(0xcd, forAddress: 0x130000)
// LDA [$fe]; NOP
machine.setData(Data([0xa7, 0xfe, 0xea]), atAddress: 0x0200)
machine.setValue(0x200, for: .programCounter)
machine.runForNumber(ofCycles: 8)
XCTAssertEqual(machine.value(for: .A), 0xcdab)
}
// TODO: all tests from this point downward.
func testIndirectDirextX8() {
// "If the D register is $FF00, the X register is $000A, and the e flag is 1 (note
// that this means the m flag must be 1), then for LDA ($FE,X), the address of the

11
Processors/65816/Implementation/65816Implementation.hpp
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@ -288,6 +288,14 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
}
continue;
case OperationConstructDirectLong:
data_address_ = (direct_ + instruction_buffer_.value) & 0xffff;
data_address_increment_mask_ = 0x00'ff'ff;
if(!(direct_&0xff)) {
++next_op_;
}
continue;
case OperationConstructDirectIndirect:
data_address_ = data_bank_ + data_buffer_.value;
data_address_increment_mask_ = 0xff'ff'ff;
@ -312,8 +320,9 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
continue;
case OperationConstructDirectIndirectLong:
data_address_ = instruction_buffer_.value;
data_address_ = data_buffer_.value;
data_address_increment_mask_ = 0xff'ff'ff;
data_buffer_.clear();
continue;
// TODO: confirm incorrect_data_address_ below.

3
Processors/65816/Implementation/65816Storage.cpp
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@ -469,7 +469,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
static void direct_indirect_long(AccessType type, bool is8bit, const std::function<void(MicroOp)> &target) {
target(CycleFetchIncrementPC); // DO.
target(OperationConstructDirect);
target(OperationConstructDirectLong);
target(CycleFetchPCThrowaway); // IO.
target(CycleFetchIncrementData); // AAL.
@ -735,6 +735,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
ProcessorStorage::ProcessorStorage() {
set_reset_state();
micro_ops_.reserve(1024);
ProcessorStorageConstructor constructor(*this);
using AccessMode = ProcessorStorageConstructor::AccessMode;

4
Processors/65816/Implementation/65816Storage.hpp
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@ -87,6 +87,10 @@ enum MicroOp: uint8_t {
/// Skips the next micro-op if the low byte of the direct register is 0.
OperationConstructDirect,
/// Exactly like OperationConstructDirect, but doesn't retain any single-byte wrapping
/// behaviour in emulation mode.
OperationConstructDirectLong,
/// Constructs the current direct indexed indirect address using the data bank,
/// direct and x registers plus the value currently in the instruction buffer.
/// Skips the next micro-op if the low byte of the direct register is 0.