6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-09-27 02:55:07 +00:00
Code Issues Projects Releases Wiki Activity

Establish some proportion of state, ready to execute _something_.

Browse Source
This commit is contained in:
Thomas Harte 2023-10-06 11:07:33 -04:00
parent 90a8999b4b
commit 28c7d27cac
3 changed files with 36 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
InstructionSets/x86/Implementation/PerformImplementation.hpp
View File

@ -287,7 +287,8 @@ template <
// * return directly if there is definitely no possible write back to RAM;
// * otherwise use the source() and destination() lambdas, and break in order to allow a writeback if necessary.
switch(instruction.operation) {
default: assert(false);
default: return;
//assert(false);
case Operation::AAA: Primitive::aaa(registers.axp(), status); return;
case Operation::AAD: Primitive::aad(registers.axp(), instruction.operand(), status); return;

6
InstructionSets/x86/Status.hpp
View File

@ -68,6 +68,12 @@ struct Status {
// Convenience getters.
template <typename IntT> IntT carry_bit() { return carry ? 1 : 0; }
void set(uint16_t value) {
carry = value & ConditionCode::Carry;
// TODO: the rest.
}
};
}

32
OSBindings/Mac/Clock SignalTests/8088Tests.mm
View File

@ -209,6 +209,7 @@ constexpr char TestSuiteHome[] = "/Users/tharte/Projects/ProcessorTests/8088/v1"
uint16_t &di() { return di_; }
uint16_t es_, cs_, ds_, ss_;
uint16_t ip_;
};
struct Memory {
std::vector<uint8_t> memory;
@ -222,10 +223,10 @@ constexpr char TestSuiteHome[] = "/Users/tharte/Projects/ProcessorTests/8088/v1"
uint32_t physical_address;
using Source = InstructionSet::x86::Source;
switch(segment) {
default: address = registers_.ds_; break;
case Source::ES: address = registers_.es_; break;
case Source::CS: address = registers_.cs_; break;
case Source::DS: address = registers_.ds_; break;
default: physical_address = registers_.ds_; break;
case Source::ES: physical_address = registers_.es_; break;
case Source::CS: physical_address = registers_.cs_; break;
case Source::DS: physical_address = registers_.ds_; break;
}
physical_address = ((physical_address << 4) + address) & 0xf'ffff;
return *reinterpret_cast<IntT *>(&memory[physical_address]);
@ -242,6 +243,29 @@ constexpr char TestSuiteHome[] = "/Users/tharte/Projects/ProcessorTests/8088/v1"
Memory memory(registers);
IO io;
// Apply initial state.
NSDictionary *const initial = test[@"initial"];
for(NSArray<NSNumber *> *ram in initial[@"ram"]) {
memory.memory[[ram[0] intValue]] = [ram[1] intValue];
}
NSDictionary *const initial_registers = initial[@"regs"];
registers.ax_.full = [initial_registers[@"ax"] intValue];
registers.bx_.full = [initial_registers[@"bx"] intValue];
registers.cx_.full = [initial_registers[@"cx"] intValue];
registers.dx_.full = [initial_registers[@"dx"] intValue];
registers.bp_ = [initial_registers[@"bp"] intValue];
registers.cs_ = [initial_registers[@"cs"] intValue];
registers.di_ = [initial_registers[@"di"] intValue];
registers.ds_ = [initial_registers[@"ds"] intValue];
registers.es_ = [initial_registers[@"es"] intValue];
registers.si_ = [initial_registers[@"si"] intValue];
registers.sp_ = [initial_registers[@"sp"] intValue];
registers.ss_ = [initial_registers[@"ss"] intValue];
registers.ip_ = [initial_registers[@"ip"] intValue];
status.set([initial_registers[@"flags"] intValue]);
InstructionSet::x86::perform<InstructionSet::x86::Model::i8086>(
decoded.second,
status,