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Merge pull request #1032 from TomHarte/68000DIVUDIVS
Generalises the 68000's DIVU and DIVS.
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commit
29c872d867
@ -517,84 +517,39 @@ template <
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Divisions.
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Divisions.
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*/
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*/
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#define announce_divide_by_zero() \
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#define DIV(Type16, Type32, flow_function) { \
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status.negative_flag = status.overflow_flag = 0; \
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status.carry_flag = 0; \
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status.zero_result = 1; \
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\
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flow_controller.raise_exception(Exception::IntegerDivideByZero)
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if(!src.w) { \
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status.negative_flag = status.overflow_flag = 0; \
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status.zero_result = 1; \
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flow_controller.raise_exception(Exception::IntegerDivideByZero); \
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return; \
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} \
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\
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const auto dividend = Type32(dest.l); \
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const auto divisor = Type32(Type16(src.w)); \
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const auto quotient = dividend / divisor; \
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\
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if(quotient != Type32(Type16(quotient))) { \
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status.overflow_flag = 1; \
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flow_controller.template flow_function<true>(dividend, divisor); \
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return; \
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} \
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\
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const auto remainder = Type16(dividend % divisor); \
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dest.l = uint32_t((uint32_t(remainder) << 16) | uint16_t(quotient)); \
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\
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status.overflow_flag = 0; \
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status.zero_result = Status::FlagT(quotient); \
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status.negative_flag = status.zero_result & 0x8000; \
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flow_controller.template flow_function<false>(dividend, divisor); \
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}
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case Operation::DIVU: {
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case Operation::DIVU: DIV(uint16_t, uint32_t, did_divu); break;
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status.carry_flag = 0;
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case Operation::DIVS: DIV(int16_t, int32_t, did_divs); break;
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// An attempt to divide by zero schedules an exception.
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#undef DIV
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if(!src.w) {
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// Schedule a divide-by-zero exception.
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announce_divide_by_zero();
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return;
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}
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uint32_t dividend = dest.l;
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uint32_t divisor = src.w;
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const auto quotient = dividend / divisor;
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// If overflow would occur, appropriate flags are set and the result is not written back.
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if(quotient > 65535) {
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status.overflow_flag = status.zero_result = status.negative_flag = 1;
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flow_controller.template did_divu<true>(dividend, divisor);
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return;
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}
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const uint16_t remainder = uint16_t(dividend % divisor);
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dest.l = uint32_t((remainder << 16) | uint16_t(quotient));
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status.overflow_flag = 0;
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status.zero_result = quotient;
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status.negative_flag = status.zero_result & 0x8000;
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flow_controller.template did_divu<false>(dividend, divisor);
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} break;
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case Operation::DIVS: {
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status.carry_flag = 0;
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// An attempt to divide by zero schedules an exception.
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if(!src.w) {
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// Schedule a divide-by-zero exception.
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announce_divide_by_zero();
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break;
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}
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const int32_t signed_dividend = int32_t(dest.l);
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const int32_t signed_divisor = s_extend16(src.w);
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const auto result_sign =
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( (0 <= signed_dividend) - (signed_dividend < 0) ) *
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( (0 <= signed_divisor) - (signed_divisor < 0) );
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const uint32_t dividend = uint32_t(std::abs(signed_dividend));
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const uint32_t divisor = uint32_t(std::abs(signed_divisor));
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int cycles_expended = 12; // Covers the nn nnn n to get beyond the sign test.
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if(signed_dividend < 0) {
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cycles_expended += 2; // An additional microycle applies if the dividend is negative.
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}
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// Check for overflow. If it exists, work here is already done.
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const auto quotient = dividend / divisor;
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if(quotient > 32767) {
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status.overflow_flag = 1;
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flow_controller.template did_divs<true>(signed_dividend, signed_divisor);
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break;
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}
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const uint16_t remainder = uint16_t(signed_dividend % signed_divisor);
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const int signed_quotient = result_sign*int(quotient);
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dest.l = uint32_t((remainder << 16) | uint16_t(signed_quotient));
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status.zero_result = Status::FlagT(signed_quotient);
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status.negative_flag = status.zero_result & 0x8000;
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status.overflow_flag = 0;
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flow_controller.template did_divs<false>(signed_dividend, signed_divisor);
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} break;
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#undef announce_divide_by_zero
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// TRAP, which is a nicer form of ILLEGAL.
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// TRAP, which is a nicer form of ILLEGAL.
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case Operation::TRAP:
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case Operation::TRAP:
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