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https://github.com/TomHarte/CLK.git
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Implements enough Copper to get a first store.
This commit is contained in:
Thomas Harte
parent
3544746934
commit
29cd8504ca
@ -39,6 +39,7 @@ enum InterruptFlag: uint16_t {
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Chipset::Chipset(uint16_t *ram, size_t size) :
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blitter_(ram, size),
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copper_(*this, ram, size),
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crt_(908, 4, Outputs::Display::Type::PAL50, Outputs::Display::InputDataType::Red4Green4Blue4) {
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}
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@ -50,12 +51,73 @@ Chipset::Changes Chipset::run_until_cpu_slot() {
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return run<true>();
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}
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bool Chipset::Copper::advance(uint16_t position) {
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(void)position;
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switch(state_) {
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default: return false;
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case State::FetchFirstWord:
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instruction[0] = ram_[address & ram_mask_];
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++address;
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state_ = State::FetchSecondWord;
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break;
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case State::FetchSecondWord:
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instruction[1] = ram_[address & ram_mask_];
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++address;
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if(!(instruction[0] & 1)) {
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// This is a move.
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// At least for now, construct a 68000-esque Microcycle.
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CPU::MC68000::Microcycle cycle;
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cycle.operation = CPU::MC68000::Microcycle::SelectWord;
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uint32_t full_address = instruction[0];
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CPU::RegisterPair16 data = instruction[1];
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cycle.address = &full_address;
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cycle.value = &data;
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chipset_.perform(cycle);
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state_ = State::FetchFirstWord;
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} else {
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// TODO: ... decode and handle WAITs and SKIPs.
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state_ = State::Stopped;
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}
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break;
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}
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return true;
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}
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template <int cycle, bool stop_if_cpu> bool Chipset::perform_cycle() {
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// TODO: actual CPU scheduling.
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if constexpr (stop_if_cpu) {
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return true;
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}
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if constexpr (cycle & 1) {
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// Odd slot priority is:
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//
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// 1. Copper, if interested.
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// 2. Bitplane.
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// 3. Blitter.
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// 4. CPU.
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if((dma_control_ & 0x280) == 0x280) {
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if(copper_.advance(uint16_t(((y_ & 0xff) << 8) | cycle))) {
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return false;
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}
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} else {
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copper_.stop();
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}
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} else {
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// Even slot use/priority:
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//
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// 1. Bitplane fetches.
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// 2. Disk, then audio, then sprites depending on region.
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// 3. Blitter.
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// 4. CPU.
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}
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return false;
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}
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@ -80,9 +142,14 @@ template <bool stop_on_cpu> Chipset::Changes Chipset::run(HalfCycles length) {
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if((line_cycle_ >> 2) == final_slot) {
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// Not enough pixels left to fill any whole slots, just stop.
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line_cycle_ += line_pixels;
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break;
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}
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// TODO: advance to the next window boundary.
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// line_pixels -= (line_pixels & 3);
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// line_cycle_ += (4 - ((line_cycle_ & 3) + 1)) & 3;
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#define C(x) \
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case x: \
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if constexpr(stop_on_cpu) { if(perform_cycle<x, stop_on_cpu>()) break; } else { perform_cycle<x, stop_on_cpu>(); } \
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@ -205,7 +272,7 @@ template <bool stop_on_cpu> Chipset::Changes Chipset::run(HalfCycles length) {
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y_ = 0;
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// TODO: the manual is vague on when this happens. Try to find out.
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copper_address_ = copper_addresses_[0];
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copper_.reload(0);
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}
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}
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}
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@ -437,31 +504,32 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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// Copper.
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case Write(0x02e):
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LOG("TODO: coprocessor control " << PADHEX(4) << cycle.value16());
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LOG("Coprocessor control " << PADHEX(4) << cycle.value16());
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copper_.set_control(cycle.value16());
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break;
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case Write(0x080):
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LOG("TODO: coprocessor first location register high " << PADHEX(4) << cycle.value16());
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copper_addresses_[0] = (copper_addresses_[0] & 0x0000'ffff) | uint32_t(cycle.value16() << 16);
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LOG("Coprocessor first location register high " << PADHEX(4) << cycle.value16());
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copper_.set_address<0, 16>(cycle.value16());
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break;
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case Write(0x082):
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LOG("TODO: coprocessor first location register low " << PADHEX(4) << cycle.value16());
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copper_addresses_[0] = (copper_addresses_[0] & 0xffff'0000) | uint32_t(cycle.value16() << 0);
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LOG("Coprocessor first location register low " << PADHEX(4) << cycle.value16());
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copper_.set_address<0, 0>(cycle.value16());
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break;
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case Write(0x084):
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LOG("TODO: coprocessor second location register high " << PADHEX(4) << cycle.value16());
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copper_addresses_[1] = (copper_addresses_[1] & 0x0000'ffff) | uint32_t(cycle.value16() << 16);
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LOG("Coprocessor second location register high " << PADHEX(4) << cycle.value16());
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copper_.set_address<1, 16>(cycle.value16());
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break;
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case Write(0x086):
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LOG("TODO: coprocessor second location register low " << PADHEX(4) << cycle.value16());
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copper_addresses_[1] = (copper_addresses_[1] & 0xffff'0000) | uint32_t(cycle.value16() << 0);
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LOG("Coprocessor second location register low " << PADHEX(4) << cycle.value16());
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copper_.set_address<1, 0>(cycle.value16());
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break;
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case Write(0x088): case Read(0x088):
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LOG("TODO: coprocessor restart at first location");
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copper_address_ = copper_addresses_[0];
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LOG("Coprocessor restart at first location");
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copper_.reload(0);
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break;
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case Write(0x08a): case Read(0x08a):
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LOG("TODO: coprocessor restart at second location");
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copper_address_ = copper_addresses_[1];
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LOG("Coprocessor restart at second location");
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copper_.reload(1);
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break;
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case Write(0x08c):
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LOG("TODO: coprocessor instruction fetch identity " << PADHEX(4) << cycle.value16());
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@ -48,7 +48,6 @@ class Chipset {
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return interrupt_level_;
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}
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// The standard CRT set.
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void set_scan_target(Outputs::Display::ScanTarget *scan_target);
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Outputs::Display::ScanStatus get_scaled_scan_status() const;
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@ -96,8 +95,49 @@ class Chipset {
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// MARK: - Copper.
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uint32_t copper_address_ = 0;
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uint32_t copper_addresses_[2]{};
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class Copper {
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public:
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Copper(Chipset &chipset, uint16_t *ram, size_t size) : chipset_(chipset), ram_(ram), ram_mask_(uint32_t(size - 1)) {}
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/// Offers a DMA slot to the Copper, specifying the current beam position.
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///
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/// @returns @c true if the slot was used; @c false otherwise.
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bool advance(uint16_t position);
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void reload(int id) {
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address = addresses[id] >> 1;
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state_ = State::FetchFirstWord;
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}
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template <int id, int shift> void set_address(uint16_t value) {
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addresses[id] = (addresses[id] & (0xffff'0000 >> shift)) | uint32_t(value << shift);
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}
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void set_control(uint16_t c) {
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control_ = c;
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}
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void stop() {
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state_ = State::Stopped;
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}
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private:
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Chipset &chipset_;
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uint32_t address = 0;
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uint32_t addresses[2]{};
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uint16_t control_ = 0;
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enum class State {
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FetchFirstWord, FetchSecondWord, Waiting, Stopped,
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} state_ = State::Stopped;
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bool skip_next_ = false;
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uint16_t instruction[2]{};
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uint16_t *ram_ = nullptr;
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uint32_t ram_mask_ = 0;
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} copper_;
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friend Copper;
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// MARK: - Pixel output.
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