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Fix CHK tests: timing and expected flags.

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This commit is contained in:
Thomas Harte 2022-05-29 15:26:56 -04:00
parent d6f72d9862
commit 2a40e419fc
1 changed files with 16 additions and 9 deletions
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25
OSBindings/Mac/Clock SignalTests/68000ControlFlowTests.mm
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@ -157,41 +157,48 @@
XCTAssertEqual(state.registers.data[2], d2); XCTAssertEqual(state.registers.data[2], d2);
} }
// Re: CHK, below; the final state of N is undocumented if Dn >= 0 and Dn < <ea>.
// Z, V and C are also undocumented by Motorola, but are documneted by 68knotes.txt.
- (void)testCHK_1111v1111 { - (void)testCHK_1111v1111 {
[self performCHKd1:0x1111 d2:0x1111]; [self performCHKd1:0x1111 d2:0x1111]; // Neither exception-generating state applies.
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.registers.program_counter, 0x1002 + 4); XCTAssertEqual(state.registers.program_counter, 0x1002 + 4);
XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend); XCTAssertEqual(
state.registers.status & (ConditionCode::Extend | ConditionCode::Zero | ConditionCode::Overflow | ConditionCode::Carry),
ConditionCode::Extend);
XCTAssertEqual(10, _machine->get_cycle_count()); XCTAssertEqual(10, _machine->get_cycle_count());
} }
- (void)testCHK_1111v0000 { - (void)testCHK_1111v0000 {
[self performCHKd1:0x1111 d2:0x0000]; [self performCHKd1:0x1111 d2:0x0000]; // Neither exception-generating state applies.
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertEqual(state.registers.program_counter, 0x1002 + 4); XCTAssertEqual(state.registers.program_counter, 0x1002 + 4);
XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend | ConditionCode::Zero); XCTAssertEqual(
state.registers.status & (ConditionCode::Extend | ConditionCode::Zero | ConditionCode::Overflow | ConditionCode::Carry),
ConditionCode::Extend | ConditionCode::Zero);
XCTAssertEqual(10, _machine->get_cycle_count()); XCTAssertEqual(10, _machine->get_cycle_count());
} }
- (void)testCHK_8000v8001 { - (void)testCHK_8000v8001 {
[self performCHKd1:0x8000 d2:0x8001]; [self performCHKd1:0x8000 d2:0x8001]; // Both less than 0 and D2 greater than D1.
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertNotEqual(state.registers.program_counter, 0x1002 + 4); XCTAssertNotEqual(state.registers.program_counter, 0x1002 + 4);
XCTAssertEqual(state.registers.stack_pointer(), 0xfffffffa); XCTAssertEqual(state.registers.stack_pointer(), 0xfffffffa);
XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend); XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend | ConditionCode::Negative);
XCTAssertEqual(42, _machine->get_cycle_count()); XCTAssertEqual(38, _machine->get_cycle_count());
} }
- (void)testCHK_8000v8000 { - (void)testCHK_8000v8000 {
[self performCHKd1:0x8000 d2:0x8000]; [self performCHKd1:0x8000 d2:0x8000]; // Less than 0.
const auto state = _machine->get_processor_state(); const auto state = _machine->get_processor_state();
XCTAssertNotEqual(state.registers.program_counter, 0x1002 + 4); XCTAssertNotEqual(state.registers.program_counter, 0x1002 + 4);
XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend | ConditionCode::Negative); XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend | ConditionCode::Negative);
XCTAssertEqual(44, _machine->get_cycle_count()); XCTAssertEqual(40, _machine->get_cycle_count());
} }
// MARK: DBcc // MARK: DBcc