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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-21 21:33:54 +00:00

Use normal member naming convention.

This commit is contained in:
Thomas Harte 2024-09-08 20:16:43 -04:00
parent 8feb8aaadc
commit 2a9e1ea045
2 changed files with 75 additions and 75 deletions

View File

@ -51,85 +51,85 @@ uint8_t VideoOutput::run_for(const Cycles cycles) {
int number_of_cycles = cycles.as<int>(); int number_of_cycles = cycles.as<int>();
while(number_of_cycles--) { while(number_of_cycles--) {
// Horizontal and vertical counter updates. // Horizontal and vertical counter updates.
const bool is_v_end = v_count == v_total(); const bool is_v_end = v_count_ == v_total();
h_count += 8; h_count_ += 8;
if(h_count == h_total) { if(h_count_ == h_total) {
h_count = 0; h_count_ = 0;
++v_count; ++v_count_;
if(is_v_end) { if(is_v_end) {
v_count = 0; v_count_ = 0;
field = !field; field_ = !field_;
} }
} }
// Test for interrupts. // Test for interrupts.
if(v_count == v_rtc && ((!field && !h_count) || (field && h_count == h_half))) { if(v_count_ == v_rtc && ((!field_ && !h_count_) || (field_ && h_count_ == h_half))) {
interrupts |= static_cast<uint8_t>(Interrupt::RealTimeClock); interrupts |= static_cast<uint8_t>(Interrupt::RealTimeClock);
} }
if(h_count == hsync_start && ((v_count == v_disp_gph && !mode_text) or (v_count == v_disp_txt && mode_text))) { if(h_count_ == hsync_start && ((v_count_ == v_disp_gph && !mode_text_) or (v_count_ == v_disp_txt && mode_text_))) {
interrupts |= static_cast<uint8_t>(Interrupt::DisplayEnd); interrupts |= static_cast<uint8_t>(Interrupt::DisplayEnd);
} }
// Update syncs. // Update syncs.
if(!field) { if(!field_) {
if(!h_count && v_count == vsync_start) { if(!h_count_ && v_count_ == vsync_start) {
vsync_int = true; vsync_int_ = true;
} else if(h_count == h_half && v_count == vsync_end) { } else if(h_count_ == h_half && v_count_ == vsync_end) {
vsync_int = false; vsync_int_ = false;
} }
} else { } else {
if(h_count == h_half && v_count == vsync_start) { if(h_count_ == h_half && v_count_ == vsync_start) {
vsync_int = true; vsync_int_ = true;
} else if(!h_count && v_count == vsync_end + 1) { } else if(!h_count_ && v_count_ == vsync_end + 1) {
vsync_int = false; vsync_int_ = false;
} }
} }
if(h_count == hsync_start) { if(h_count_ == hsync_start) {
hsync_int = true; hsync_int_ = true;
} else if(h_count == hsync_end) { } else if(h_count_ == hsync_end) {
hsync_int = false; hsync_int_ = false;
} }
// Update character row on the trailing edge of hsync. // Update character row on the trailing edge of hsync.
if(h_count == hsync_end) { if(h_count_ == hsync_end) {
if(is_v_end) { if(is_v_end) {
char_row = 0; char_row_ = 0;
} else { } else {
char_row = last_line() ? 0 : char_row + 1; char_row_ = last_line() ? 0 : char_row_ + 1;
} }
} }
// Disable the top bit of the char_row counter outside of text mode. // Disable the top bit of the char_row counter outside of text mode.
if(!mode_text) { if(!mode_text_) {
char_row &= 7; char_row_ &= 7;
} }
// Latch video address at frame start. // Latch video address at frame start.
if(h_count == h_reset_addr && is_v_end) { if(h_count_ == h_reset_addr && is_v_end) {
row_addr = byte_addr = screen_base; row_addr_ = byte_addr_ = screen_base_;
} }
// Copy byte_addr back into row_addr if a new character row has begun. // Copy byte_addr back into row_addr if a new character row has begun.
if(hsync_int) { if(hsync_int_) {
if(last_line()) { if(last_line()) {
row_addr = byte_addr; row_addr_ = byte_addr_;
} else { } else {
byte_addr = row_addr; byte_addr_ = row_addr_;
} }
} }
// Determine current output item. // Determine current output item.
OutputStage stage; OutputStage stage;
int screen_pitch = screen_pitch_; int screen_pitch = screen_pitch_;
if(vsync_int || hsync_int) { if(vsync_int_ || hsync_int_) {
stage = OutputStage::Sync; stage = OutputStage::Sync;
} else if(in_blank()) { } else if(in_blank()) {
stage = OutputStage::Blank; stage = OutputStage::Blank;
} else { } else {
stage = OutputStage::Pixels; stage = OutputStage::Pixels;
screen_pitch = (mode_40 ? 320 : 640) / static_cast<int>(mode_bpp); screen_pitch = (mode_40_ ? 320 : 640) / static_cast<int>(mode_bpp_);
} }
if(stage != output_ || screen_pitch != screen_pitch_) { if(stage != output_ || screen_pitch != screen_pitch_) {
@ -156,10 +156,10 @@ uint8_t VideoOutput::run_for(const Cycles cycles) {
} }
} }
++output_length_; ++output_length_;
if(output_ == OutputStage::Pixels && (!mode_40 || h_count & 8) && current_output_target_) { if(output_ == OutputStage::Pixels && (!mode_40_ || h_count_ & 8) && current_output_target_) {
const uint8_t data = ram_[byte_addr | char_row]; const uint8_t data = ram_[byte_addr_ | char_row_];
switch(mode_bpp) { switch(mode_bpp_) {
case Bpp::One: case Bpp::One:
current_output_target_[0] = palette1bpp_[(data >> 7) & 1]; current_output_target_[0] = palette1bpp_[(data >> 7) & 1];
current_output_target_[1] = palette1bpp_[(data >> 6) & 1]; current_output_target_[1] = palette1bpp_[(data >> 6) & 1];
@ -188,15 +188,15 @@ uint8_t VideoOutput::run_for(const Cycles cycles) {
// Increment the byte address across the line. // Increment the byte address across the line.
// (slghtly pained logic here because the input clock is still at the pixel rate, not the byte rate) // (slghtly pained logic here because the input clock is still at the pixel rate, not the byte rate)
if(h_count < h_active) { if(h_count_ < h_active) {
if( if(
(!mode_40 && !(h_count & 0x7)) || (!mode_40_ && !(h_count_ & 0x7)) ||
(mode_40 && ((h_count & 0xf) == 0x8)) (mode_40_ && ((h_count_ & 0xf) == 0x8))
) { ) {
byte_addr += 8; byte_addr_ += 8;
if(!(byte_addr & 0b0111'1000'0000'0000)) { if(!(byte_addr_ & 0b0111'1000'0000'0000)) {
byte_addr = mode_base | (byte_addr & 0x0000'0111'1111'1111); byte_addr_ = mode_base_ | (byte_addr_ & 0x0000'0111'1111'1111);
} }
} }
} }
@ -211,34 +211,34 @@ void VideoOutput::write(int address, uint8_t value) {
address &= 0xf; address &= 0xf;
switch(address) { switch(address) {
case 0x02: case 0x02:
screen_base = screen_base_ =
(screen_base & 0b0111'1110'0000'0000) | (screen_base_ & 0b0111'1110'0000'0000) |
((value << 1) & 0b0000'0001'1100'0000); ((value << 1) & 0b0000'0001'1100'0000);
break; break;
case 0x03: case 0x03:
screen_base = screen_base_ =
((value << 9) & 0b0111'1110'0000'0000) | ((value << 9) & 0b0111'1110'0000'0000) |
(screen_base & 0b0000'0001'1100'0000); (screen_base_ & 0b0000'0001'1100'0000);
break; break;
case 0x07: { case 0x07: {
uint8_t mode = (value >> 3)&7; uint8_t mode = (value >> 3)&7;
mode_40 = mode >= 4; mode_40_ = mode >= 4;
mode_text = mode == 3 || mode == 6; mode_text_ = mode == 3 || mode == 6;
switch(mode) { switch(mode) {
case 0: case 0:
case 1: case 1:
case 2: mode_base = 0x3000; break; case 2: mode_base_ = 0x3000; break;
case 3: mode_base = 0x4000; break; case 3: mode_base_ = 0x4000; break;
case 6: mode_base = 0x6000; break; case 6: mode_base_ = 0x6000; break;
default: mode_base = 0x5800; break; default: mode_base_ = 0x5800; break;
} }
switch(mode) { switch(mode) {
default: mode_bpp = Bpp::One; break; default: mode_bpp_ = Bpp::One; break;
case 1: case 1:
case 5: mode_bpp = Bpp::Two; break; case 5: mode_bpp_ = Bpp::Two; break;
case 2: mode_bpp = Bpp::Four; break; case 2: mode_bpp_ = Bpp::Four; break;
} }
} break; } break;
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x08: case 0x09: case 0x0a: case 0x0b:

View File

@ -52,14 +52,14 @@ class VideoOutput {
/// @returns The number of 2Mhz cycles that will pass before completion of an attempted /// @returns The number of 2Mhz cycles that will pass before completion of an attempted
/// IO [/1Mhz] access that is first signalled in the upcoming cycle. /// IO [/1Mhz] access that is first signalled in the upcoming cycle.
Cycles io_delay() { Cycles io_delay() {
return 2 + ((h_count >> 3)&1); return 2 + ((h_count_ >> 3)&1);
} }
/// @returns The number of 2Mhz cycles that will pass before completion of an attempted /// @returns The number of 2Mhz cycles that will pass before completion of an attempted
/// RAM access that is first signalled in the upcoming cycle. /// RAM access that is first signalled in the upcoming cycle.
Cycles ram_delay() { Cycles ram_delay() {
if(!mode_40 && !in_blank()) { if(!mode_40_ && !in_blank()) {
return 2 + ((h_active - h_count) >> 3); return 2 + ((h_active - h_count_) >> 3);
} }
return io_delay(); return io_delay();
} }
@ -113,29 +113,29 @@ class VideoOutput {
} }
// User-selected base address; constrained to a 64-byte boundary by the setter. // User-selected base address; constrained to a 64-byte boundary by the setter.
uint16_t screen_base = 0; uint16_t screen_base_ = 0;
// Parameters implied by mode selection. // Parameters implied by mode selection.
uint16_t mode_base = 0; uint16_t mode_base_ = 0;
bool mode_40 = true; bool mode_40_ = true;
bool mode_text = false; bool mode_text_ = false;
enum class Bpp { enum class Bpp {
One = 1, Two = 2, Four = 4 One = 1, Two = 2, Four = 4
} mode_bpp = Bpp::One; } mode_bpp_ = Bpp::One;
// Frame position. // Frame position.
int v_count = 0; int v_count_ = 0;
int h_count = 0; int h_count_ = 0;
bool field = false; bool field_ = true;
// Current working address. // Current working address.
uint16_t row_addr = 0; // Address, sans character row, adopted at the start of a row. uint16_t row_addr_ = 0; // Address, sans character row, adopted at the start of a row.
uint16_t byte_addr = 0; // Current working address, incremented as the raster moves across the line. uint16_t byte_addr_ = 0; // Current working address, incremented as the raster moves across the line.
int char_row = 0; // Character row; 09 in text mode, 07 in graphics. int char_row_ = 0; // Character row; 09 in text mode, 07 in graphics.
// Sync states. // Sync states.
bool vsync_int = false; // True => vsync active. bool vsync_int_ = false; // True => vsync active.
bool hsync_int = false; // True => hsync active. bool hsync_int_ = false; // True => hsync active.
// Horizontal timing parameters; all in terms of the 16Mhz pixel clock but conveniently all // Horizontal timing parameters; all in terms of the 16Mhz pixel clock but conveniently all
// divisible by 8, so it's safe to count time with a 2Mhz input. // divisible by 8, so it's safe to count time with a 2Mhz input.
@ -162,14 +162,14 @@ class VideoOutput {
// Various signals that it was convenient to factor out. // Various signals that it was convenient to factor out.
int v_total() const { int v_total() const {
return field ? 312 : 311; return field_ ? 312 : 311;
} }
bool last_line() const { bool last_line() const {
return char_row == (mode_text ? 9 : 7); return char_row_ == (mode_text_ ? 9 : 7);
} }
bool in_blank() const { bool in_blank() const {
return h_count >= h_active || (mode_text && v_count >= v_active_txt) || (!mode_text && v_count >= v_active_gph) || char_row >= 8; return h_count_ >= h_active || (mode_text_ && v_count_ >= v_active_txt) || (!mode_text_ && v_count_ >= v_active_gph) || char_row_ >= 8;
}}; }};
} }