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https://github.com/TomHarte/CLK.git
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Use normal member naming convention.
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8feb8aaadc
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2a9e1ea045
@ -51,85 +51,85 @@ uint8_t VideoOutput::run_for(const Cycles cycles) {
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int number_of_cycles = cycles.as<int>();
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while(number_of_cycles--) {
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// Horizontal and vertical counter updates.
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const bool is_v_end = v_count == v_total();
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h_count += 8;
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if(h_count == h_total) {
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h_count = 0;
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++v_count;
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const bool is_v_end = v_count_ == v_total();
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h_count_ += 8;
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if(h_count_ == h_total) {
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h_count_ = 0;
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++v_count_;
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if(is_v_end) {
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v_count = 0;
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field = !field;
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v_count_ = 0;
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field_ = !field_;
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}
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}
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// Test for interrupts.
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if(v_count == v_rtc && ((!field && !h_count) || (field && h_count == h_half))) {
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if(v_count_ == v_rtc && ((!field_ && !h_count_) || (field_ && h_count_ == h_half))) {
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interrupts |= static_cast<uint8_t>(Interrupt::RealTimeClock);
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}
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if(h_count == hsync_start && ((v_count == v_disp_gph && !mode_text) or (v_count == v_disp_txt && mode_text))) {
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if(h_count_ == hsync_start && ((v_count_ == v_disp_gph && !mode_text_) or (v_count_ == v_disp_txt && mode_text_))) {
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interrupts |= static_cast<uint8_t>(Interrupt::DisplayEnd);
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}
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// Update syncs.
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if(!field) {
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if(!h_count && v_count == vsync_start) {
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vsync_int = true;
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} else if(h_count == h_half && v_count == vsync_end) {
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vsync_int = false;
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if(!field_) {
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if(!h_count_ && v_count_ == vsync_start) {
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vsync_int_ = true;
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} else if(h_count_ == h_half && v_count_ == vsync_end) {
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vsync_int_ = false;
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}
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} else {
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if(h_count == h_half && v_count == vsync_start) {
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vsync_int = true;
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} else if(!h_count && v_count == vsync_end + 1) {
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vsync_int = false;
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if(h_count_ == h_half && v_count_ == vsync_start) {
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vsync_int_ = true;
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} else if(!h_count_ && v_count_ == vsync_end + 1) {
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vsync_int_ = false;
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}
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}
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if(h_count == hsync_start) {
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hsync_int = true;
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} else if(h_count == hsync_end) {
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hsync_int = false;
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if(h_count_ == hsync_start) {
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hsync_int_ = true;
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} else if(h_count_ == hsync_end) {
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hsync_int_ = false;
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}
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// Update character row on the trailing edge of hsync.
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if(h_count == hsync_end) {
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if(h_count_ == hsync_end) {
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if(is_v_end) {
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char_row = 0;
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char_row_ = 0;
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} else {
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char_row = last_line() ? 0 : char_row + 1;
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char_row_ = last_line() ? 0 : char_row_ + 1;
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}
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}
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// Disable the top bit of the char_row counter outside of text mode.
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if(!mode_text) {
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char_row &= 7;
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if(!mode_text_) {
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char_row_ &= 7;
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}
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// Latch video address at frame start.
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if(h_count == h_reset_addr && is_v_end) {
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row_addr = byte_addr = screen_base;
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if(h_count_ == h_reset_addr && is_v_end) {
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row_addr_ = byte_addr_ = screen_base_;
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}
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// Copy byte_addr back into row_addr if a new character row has begun.
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if(hsync_int) {
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if(hsync_int_) {
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if(last_line()) {
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row_addr = byte_addr;
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row_addr_ = byte_addr_;
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} else {
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byte_addr = row_addr;
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byte_addr_ = row_addr_;
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}
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}
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// Determine current output item.
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OutputStage stage;
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int screen_pitch = screen_pitch_;
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if(vsync_int || hsync_int) {
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if(vsync_int_ || hsync_int_) {
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stage = OutputStage::Sync;
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} else if(in_blank()) {
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stage = OutputStage::Blank;
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} else {
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stage = OutputStage::Pixels;
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screen_pitch = (mode_40 ? 320 : 640) / static_cast<int>(mode_bpp);
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screen_pitch = (mode_40_ ? 320 : 640) / static_cast<int>(mode_bpp_);
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}
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if(stage != output_ || screen_pitch != screen_pitch_) {
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@ -156,10 +156,10 @@ uint8_t VideoOutput::run_for(const Cycles cycles) {
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}
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}
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++output_length_;
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if(output_ == OutputStage::Pixels && (!mode_40 || h_count & 8) && current_output_target_) {
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const uint8_t data = ram_[byte_addr | char_row];
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if(output_ == OutputStage::Pixels && (!mode_40_ || h_count_ & 8) && current_output_target_) {
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const uint8_t data = ram_[byte_addr_ | char_row_];
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switch(mode_bpp) {
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switch(mode_bpp_) {
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case Bpp::One:
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current_output_target_[0] = palette1bpp_[(data >> 7) & 1];
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current_output_target_[1] = palette1bpp_[(data >> 6) & 1];
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@ -188,15 +188,15 @@ uint8_t VideoOutput::run_for(const Cycles cycles) {
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// Increment the byte address across the line.
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// (slghtly pained logic here because the input clock is still at the pixel rate, not the byte rate)
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if(h_count < h_active) {
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if(h_count_ < h_active) {
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if(
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(!mode_40 && !(h_count & 0x7)) ||
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(mode_40 && ((h_count & 0xf) == 0x8))
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(!mode_40_ && !(h_count_ & 0x7)) ||
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(mode_40_ && ((h_count_ & 0xf) == 0x8))
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) {
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byte_addr += 8;
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byte_addr_ += 8;
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if(!(byte_addr & 0b0111'1000'0000'0000)) {
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byte_addr = mode_base | (byte_addr & 0x0000'0111'1111'1111);
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if(!(byte_addr_ & 0b0111'1000'0000'0000)) {
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byte_addr_ = mode_base_ | (byte_addr_ & 0x0000'0111'1111'1111);
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}
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}
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}
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@ -211,34 +211,34 @@ void VideoOutput::write(int address, uint8_t value) {
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address &= 0xf;
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switch(address) {
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case 0x02:
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screen_base =
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(screen_base & 0b0111'1110'0000'0000) |
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screen_base_ =
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(screen_base_ & 0b0111'1110'0000'0000) |
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((value << 1) & 0b0000'0001'1100'0000);
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break;
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case 0x03:
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screen_base =
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screen_base_ =
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((value << 9) & 0b0111'1110'0000'0000) |
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(screen_base & 0b0000'0001'1100'0000);
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(screen_base_ & 0b0000'0001'1100'0000);
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break;
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case 0x07: {
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uint8_t mode = (value >> 3)&7;
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mode_40 = mode >= 4;
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mode_text = mode == 3 || mode == 6;
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mode_40_ = mode >= 4;
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mode_text_ = mode == 3 || mode == 6;
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switch(mode) {
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case 0:
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case 1:
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case 2: mode_base = 0x3000; break;
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case 3: mode_base = 0x4000; break;
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case 6: mode_base = 0x6000; break;
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default: mode_base = 0x5800; break;
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case 2: mode_base_ = 0x3000; break;
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case 3: mode_base_ = 0x4000; break;
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case 6: mode_base_ = 0x6000; break;
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default: mode_base_ = 0x5800; break;
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}
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switch(mode) {
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default: mode_bpp = Bpp::One; break;
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default: mode_bpp_ = Bpp::One; break;
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case 1:
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case 5: mode_bpp = Bpp::Two; break;
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case 2: mode_bpp = Bpp::Four; break;
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case 5: mode_bpp_ = Bpp::Two; break;
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case 2: mode_bpp_ = Bpp::Four; break;
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}
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} break;
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case 0x08: case 0x09: case 0x0a: case 0x0b:
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@ -52,14 +52,14 @@ class VideoOutput {
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/// @returns The number of 2Mhz cycles that will pass before completion of an attempted
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/// IO [/1Mhz] access that is first signalled in the upcoming cycle.
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Cycles io_delay() {
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return 2 + ((h_count >> 3)&1);
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return 2 + ((h_count_ >> 3)&1);
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}
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/// @returns The number of 2Mhz cycles that will pass before completion of an attempted
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/// RAM access that is first signalled in the upcoming cycle.
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Cycles ram_delay() {
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if(!mode_40 && !in_blank()) {
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return 2 + ((h_active - h_count) >> 3);
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if(!mode_40_ && !in_blank()) {
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return 2 + ((h_active - h_count_) >> 3);
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}
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return io_delay();
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}
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@ -113,29 +113,29 @@ class VideoOutput {
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}
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// User-selected base address; constrained to a 64-byte boundary by the setter.
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uint16_t screen_base = 0;
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uint16_t screen_base_ = 0;
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// Parameters implied by mode selection.
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uint16_t mode_base = 0;
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bool mode_40 = true;
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bool mode_text = false;
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uint16_t mode_base_ = 0;
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bool mode_40_ = true;
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bool mode_text_ = false;
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enum class Bpp {
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One = 1, Two = 2, Four = 4
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} mode_bpp = Bpp::One;
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} mode_bpp_ = Bpp::One;
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// Frame position.
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int v_count = 0;
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int h_count = 0;
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bool field = false;
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int v_count_ = 0;
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int h_count_ = 0;
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bool field_ = true;
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// Current working address.
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uint16_t row_addr = 0; // Address, sans character row, adopted at the start of a row.
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uint16_t byte_addr = 0; // Current working address, incremented as the raster moves across the line.
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int char_row = 0; // Character row; 0–9 in text mode, 0–7 in graphics.
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uint16_t row_addr_ = 0; // Address, sans character row, adopted at the start of a row.
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uint16_t byte_addr_ = 0; // Current working address, incremented as the raster moves across the line.
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int char_row_ = 0; // Character row; 0–9 in text mode, 0–7 in graphics.
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// Sync states.
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bool vsync_int = false; // True => vsync active.
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bool hsync_int = false; // True => hsync active.
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bool vsync_int_ = false; // True => vsync active.
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bool hsync_int_ = false; // True => hsync active.
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// Horizontal timing parameters; all in terms of the 16Mhz pixel clock but conveniently all
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// divisible by 8, so it's safe to count time with a 2Mhz input.
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@ -162,14 +162,14 @@ class VideoOutput {
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// Various signals that it was convenient to factor out.
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int v_total() const {
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return field ? 312 : 311;
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return field_ ? 312 : 311;
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}
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bool last_line() const {
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return char_row == (mode_text ? 9 : 7);
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return char_row_ == (mode_text_ ? 9 : 7);
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}
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bool in_blank() const {
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return h_count >= h_active || (mode_text && v_count >= v_active_txt) || (!mode_text && v_count >= v_active_gph) || char_row >= 8;
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return h_count_ >= h_active || (mode_text_ && v_count_ >= v_active_txt) || (!mode_text_ && v_count_ >= v_active_gph) || char_row_ >= 8;
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}};
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}
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