From 659e4f69871d9d5d9c7fb66bb9db1da6b4c29be3 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Wed, 1 Jun 2022 20:30:51 -0400 Subject: [PATCH] Include fixed cost of rolls. Which includes providing slightly more information to `did_shift`. --- .../Implementation/PerformImplementation.hpp | 20 +++++++++---------- InstructionSets/M68k/Perform.hpp | 7 +++++-- .../Implementation/68000Mk2Implementation.hpp | 8 ++++++-- .../Implementation/68000Mk2Storage.hpp | 2 +- 4 files changed, 22 insertions(+), 15 deletions(-) diff --git a/InstructionSets/M68k/Implementation/PerformImplementation.hpp b/InstructionSets/M68k/Implementation/PerformImplementation.hpp index ef6f3d42d..91bc447f4 100644 --- a/InstructionSets/M68k/Implementation/PerformImplementation.hpp +++ b/InstructionSets/M68k/Implementation/PerformImplementation.hpp @@ -828,14 +828,14 @@ template < set_neg_zero(v, m); \ status.overflow_flag = (Status::FlagT(value) ^ status.zero_result) & Status::FlagT(m); -#define decode_shift_count() \ +#define decode_shift_count(type) \ int shift_count = src.l & 63; \ - flow_controller.did_shift(shift_count); + flow_controller.template did_shift(shift_count); #define set_flags_w(t) set_flags(src.w, 0x8000, t) #define asl(destination, size) {\ - decode_shift_count(); \ + decode_shift_count(decltype(destination)); \ const auto value = destination; \ \ if(!shift_count) { \ @@ -865,7 +865,7 @@ template < case Operation::ASLl: asl(dest.l, 32); break; #define asr(destination, size) {\ - decode_shift_count(); \ + decode_shift_count(decltype(destination)); \ const auto value = destination; \ \ if(!shift_count) { \ @@ -909,7 +909,7 @@ template < status.carry_flag = value & (t); #define lsl(destination, size) {\ - decode_shift_count(); \ + decode_shift_count(decltype(destination)); \ const auto value = destination; \ \ if(!shift_count) { \ @@ -933,7 +933,7 @@ template < case Operation::LSLl: lsl(dest.l, 32); break; #define lsr(destination, size) {\ - decode_shift_count(); \ + decode_shift_count(decltype(destination)); \ const auto value = destination; \ \ if(!shift_count) { \ @@ -957,7 +957,7 @@ template < case Operation::LSRl: lsr(dest.l, 32); break; #define rol(destination, size) { \ - decode_shift_count(); \ + decode_shift_count(decltype(destination)); \ const auto value = destination; \ \ if(!shift_count) { \ @@ -985,7 +985,7 @@ template < case Operation::ROLl: rol(dest.l, 32); break; #define ror(destination, size) { \ - decode_shift_count(); \ + decode_shift_count(decltype(destination)); \ const auto value = destination; \ \ if(!shift_count) { \ @@ -1013,7 +1013,7 @@ template < case Operation::RORl: ror(dest.l, 32); break; #define roxl(destination, size) { \ - decode_shift_count(); \ + decode_shift_count(decltype(destination)); \ \ shift_count %= (size + 1); \ uint64_t compound = uint64_t(destination) | (status.extend_flag ? (1ull << size) : 0); \ @@ -1037,7 +1037,7 @@ template < case Operation::ROXLl: roxl(dest.l, 32); break; #define roxr(destination, size) { \ - decode_shift_count(); \ + decode_shift_count(decltype(destination)); \ \ shift_count %= (size + 1); \ uint64_t compound = uint64_t(destination) | (status.extend_flag ? (1ull << size) : 0); \ diff --git a/InstructionSets/M68k/Perform.hpp b/InstructionSets/M68k/Perform.hpp index 3df7b5736..300706b00 100644 --- a/InstructionSets/M68k/Perform.hpp +++ b/InstructionSets/M68k/Perform.hpp @@ -32,8 +32,11 @@ struct NullFlowController { /// Indicates that a @c CHK was performed, along with whether the result @c was_under zero or @c was_over the source operand. void did_chk([[maybe_unused]] bool was_under, [[maybe_unused]] bool was_over) {} - /// Indicates an in-register shift or roll occurred, providing the number of bits shifted by. - void did_shift([[maybe_unused]] int bit_count) {} + /// Indicates an in-register shift or roll occurred, providing the number of bits shifted by + /// and the type shifted. + /// + /// @c IntT may be uint8_t, uint16_t or uint32_t. + template void did_shift([[maybe_unused]] int bit_count) {} /// Indicates that a @c DIVU was performed, providing the @c dividend and @c divisor. /// If @c did_overflow is @c true then the divide ended in overflow. diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp index 04d589295..45cf61952 100644 --- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp +++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp @@ -2649,8 +2649,12 @@ template void ProcessorBase::did_muls(IntT multiplier) { #undef convert_to_bit_count_16 -void ProcessorBase::did_shift(int bits_shifted) { - dynamic_instruction_length_ = bits_shifted; +template void ProcessorBase::did_shift(int bits_shifted) { + if constexpr (sizeof(IntT) == 4) { + dynamic_instruction_length_ = bits_shifted + 2; + } else { + dynamic_instruction_length_ = bits_shifted + 1; + } } template void ProcessorBase::raise_exception(int vector) { diff --git a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp index c0ea0a942..358dceb2c 100644 --- a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp +++ b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp @@ -148,7 +148,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController { template void did_muls(IntT); inline void did_chk(bool, bool); inline void did_scc(bool); - inline void did_shift(int); + template void did_shift(int); template void did_divu(uint32_t, uint32_t); template void did_divs(int32_t, int32_t); inline void did_bit_op(int);