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Decodes the 6850 control register, and starts working on standardised serial ports.

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This commit is contained in:
Thomas Harte
2019-10-12 18:19:55 -04:00
parent 4b09d7c41d
commit 2bd7be13b5
5 changed files with 132 additions and 0 deletions
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Components/6850/6850.cpp
+28
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@@ -30,6 +30,30 @@ void ACIA::write(int address, uint8_t value) {
if((value&3) == 3) {
LOG("Reset");
} else {
switch(value & 3) {
default:
case 0: divider_ = 1; break;
case 1: divider_ = 16; break;
case 2: divider_ = 64; break;
}
switch((value >> 2) & 7) {
default:
case 0: word_size_ = 7; stop_bits_ = 2; parity_ = Parity::Even; break;
case 1: word_size_ = 7; stop_bits_ = 2; parity_ = Parity::Odd; break;
case 2: word_size_ = 7; stop_bits_ = 1; parity_ = Parity::Even; break;
case 3: word_size_ = 7; stop_bits_ = 1; parity_ = Parity::Odd; break;
case 4: word_size_ = 8; stop_bits_ = 2; parity_ = Parity::None; break;
case 5: word_size_ = 8; stop_bits_ = 1; parity_ = Parity::None; break;
case 6: word_size_ = 8; stop_bits_ = 1; parity_ = Parity::Even; break;
case 7: word_size_ = 8; stop_bits_ = 1; parity_ = Parity::Odd; break;
}
switch((value >> 5) & 3) {
case 0: set_ready_to_transmit(false); transmit_interrupt_enabled_ = false; break;
case 1: set_ready_to_transmit(false); transmit_interrupt_enabled_ = true; break;
case 2: set_ready_to_transmit(true); transmit_interrupt_enabled_ = false; break;
case 3: set_ready_to_transmit(false); transmit_interrupt_enabled_ = false; break; /* TODO: transmit a break level on the transmit output. */
}
receive_interrupt_enabled_ = value & 0x80;
LOG("Write to control register");
}
}
@@ -37,3 +61,7 @@ void ACIA::write(int address, uint8_t value) {
void ACIA::run_for(HalfCycles) {
}
void ACIA::set_ready_to_transmit(bool) {
}