mirror of
https://github.com/TomHarte/CLK.git
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Move string logic into Preinstruction.
This commit is contained in:
Thomas Harte
parent
4ba20132b9
commit
2fa6b2301b
295
InstructionSets/M68k/Instruction.cpp
Normal file
295
InstructionSets/M68k/Instruction.cpp
Normal file
@ -0,0 +1,295 @@
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//
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// Instruction.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 12/05/2022.
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// Copyright © 2022 Thomas Harte. All rights reserved.
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//
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#include "Instruction.hpp"
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#include <cassert>
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using namespace InstructionSet::M68k;
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std::string Preinstruction::operand_description(int index, int opcode) const {
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switch(mode(index)) {
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default: assert(false);
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case AddressingMode::None:
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return "";
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case AddressingMode::DataRegisterDirect:
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return std::string("D") + std::to_string(reg(index));
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case AddressingMode::AddressRegisterDirect:
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return std::string("A") + std::to_string(reg(index));
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case AddressingMode::AddressRegisterIndirect:
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return std::string("(A") + std::to_string(reg(index)) + ")";
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case AddressingMode::AddressRegisterIndirectWithPostincrement:
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return std::string("(A") + std::to_string(reg(index)) + ")+";
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case AddressingMode::AddressRegisterIndirectWithPredecrement:
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return std::string("-(A") + std::to_string(reg(index)) + ")";
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case AddressingMode::AddressRegisterIndirectWithDisplacement:
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return std::string("(d16, A") + std::to_string(reg(index)) + ")";
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case AddressingMode::AddressRegisterIndirectWithIndex8bitDisplacement:
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return std::string("(d8, A") + std::to_string(reg(index)) + ", Xn)";
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case AddressingMode::ProgramCounterIndirectWithDisplacement:
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return "(d16, PC)";
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case AddressingMode::ProgramCounterIndirectWithIndex8bitDisplacement:
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return "(d8, PC, Xn)";
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case AddressingMode::AbsoluteShort:
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return "(xxx).w";
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case AddressingMode::AbsoluteLong:
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return "(xxx).l";
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case AddressingMode::ImmediateData:
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return "#";
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case AddressingMode::Quick:
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if(opcode == -1) {
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return "Q";
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}
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return std::to_string(int(quick(uint16_t(opcode), operation)));
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}
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}
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std::string Preinstruction::to_string(int opcode) const {
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bool flip_operands = false;
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const char *instruction;
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switch(operation) {
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case Operation::Undefined: instruction = "None"; break;
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case Operation::NOP: instruction = "NOP"; break;
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case Operation::ABCD: instruction = "ABCD"; break;
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case Operation::SBCD: instruction = "SBCD"; break;
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case Operation::NBCD: instruction = "NBCD"; break;
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case Operation::ADDb: instruction = "ADD.b"; break;
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case Operation::ADDw: instruction = "ADD.w"; break;
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case Operation::ADDl: instruction = "ADD.l"; break;
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case Operation::ADDAw:
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if(mode<0>() == AddressingMode::Quick) {
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instruction = "ADD.w";
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} else {
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instruction = "ADDA.w";
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}
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break;
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case Operation::ADDAl:
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if(mode<0>() == AddressingMode::Quick) {
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instruction = "ADD.l";
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} else {
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instruction = "ADDA.l";
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}
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break;
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case Operation::ADDXb: instruction = "ADDX.b"; break;
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case Operation::ADDXw: instruction = "ADDX.w"; break;
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case Operation::ADDXl: instruction = "ADDX.l"; break;
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case Operation::SUBb: instruction = "SUB.b"; break;
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case Operation::SUBw: instruction = "SUB.w"; break;
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case Operation::SUBl: instruction = "SUB.l"; break;
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case Operation::SUBAw:
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if(mode<0>() == AddressingMode::Quick) {
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instruction = "SUB.w";
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} else {
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instruction = "SUBA.w";
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}
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break;
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case Operation::SUBAl:
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if(mode<0>() == AddressingMode::Quick) {
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instruction = "SUB.l";
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} else {
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instruction = "SUBA.l";
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}
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break;
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case Operation::SUBXb: instruction = "SUBX.b"; break;
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case Operation::SUBXw: instruction = "SUBX.w"; break;
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case Operation::SUBXl: instruction = "SUBX.l"; break;
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case Operation::MOVEb: instruction = "MOVE.b"; break;
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case Operation::MOVEw: instruction = "MOVE.w"; break;
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case Operation::MOVEl:
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if(mode<0>() == AddressingMode::Quick) {
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instruction = "MOVE.q";
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} else {
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instruction = "MOVE.l";
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}
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break;
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case Operation::MOVEAw: instruction = "MOVEA.w"; break;
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case Operation::MOVEAl: instruction = "MOVEA.l"; break;
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case Operation::LEA: instruction = "LEA"; break;
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case Operation::PEA: instruction = "PEA"; break;
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case Operation::MOVEtoSR: instruction = "MOVEtoSR"; break;
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case Operation::MOVEfromSR: instruction = "MOVEfromSR"; break;
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case Operation::MOVEtoCCR: instruction = "MOVEtoCCR"; break;
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case Operation::MOVEtoUSP: instruction = "MOVEtoUSP"; break;
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case Operation::MOVEfromUSP: instruction = "MOVEfromUSP"; break;
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case Operation::ORItoSR: instruction = "ORItoSR"; break;
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case Operation::ORItoCCR: instruction = "ORItoCCR"; break;
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case Operation::ANDItoSR: instruction = "ANDItoSR"; break;
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case Operation::ANDItoCCR: instruction = "ANDItoCCR"; break;
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case Operation::EORItoSR: instruction = "EORItoSR"; break;
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case Operation::EORItoCCR: instruction = "EORItoCCR"; break;
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case Operation::BTST: instruction = "BTST"; break;
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case Operation::BCLR: instruction = "BCLR"; break;
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case Operation::BCHG: instruction = "BCHG"; break;
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case Operation::BSET: instruction = "BSET"; break;
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case Operation::CMPb: instruction = "CMP.b"; break;
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case Operation::CMPw: instruction = "CMP.w"; break;
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case Operation::CMPl: instruction = "CMP.l"; break;
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case Operation::CMPAw: instruction = "CMPA.w"; break;
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case Operation::CMPAl: instruction = "CMPA.l"; break;
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case Operation::TSTb: instruction = "TST.b"; break;
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case Operation::TSTw: instruction = "TST.w"; break;
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case Operation::TSTl: instruction = "TST.l"; break;
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case Operation::JMP: instruction = "JMP"; break;
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case Operation::JSR: instruction = "JSR"; break;
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case Operation::RTS: instruction = "RTS"; break;
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case Operation::DBcc: instruction = "DBcc"; break;
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case Operation::Scc: instruction = "Scc"; break;
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case Operation::Bccb:
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case Operation::Bccl:
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case Operation::Bccw: instruction = "Bcc"; break;
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case Operation::BSRb:
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case Operation::BSRl:
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case Operation::BSRw: instruction = "BSR"; break;
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case Operation::CLRb: instruction = "CLR.b"; break;
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case Operation::CLRw: instruction = "CLR.w"; break;
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case Operation::CLRl: instruction = "CLR.l"; break;
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case Operation::NEGXb: instruction = "NEGX.b"; break;
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case Operation::NEGXw: instruction = "NEGX.w"; break;
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case Operation::NEGXl: instruction = "NEGX.l"; break;
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case Operation::NEGb: instruction = "NEG.b"; break;
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case Operation::NEGw: instruction = "NEG.w"; break;
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case Operation::NEGl: instruction = "NEG.l"; break;
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case Operation::ASLb: instruction = "ASL.b"; break;
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case Operation::ASLw: instruction = "ASL.w"; break;
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case Operation::ASLl: instruction = "ASL.l"; break;
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case Operation::ASLm: instruction = "ASL.w"; break;
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case Operation::ASRb: instruction = "ASR.b"; break;
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case Operation::ASRw: instruction = "ASR.w"; break;
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case Operation::ASRl: instruction = "ASR.l"; break;
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case Operation::ASRm: instruction = "ASR.w"; break;
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case Operation::LSLb: instruction = "LSL.b"; break;
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case Operation::LSLw: instruction = "LSL.w"; break;
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case Operation::LSLl: instruction = "LSL.l"; break;
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case Operation::LSLm: instruction = "LSL.w"; break;
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case Operation::LSRb: instruction = "LSR.b"; break;
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case Operation::LSRw: instruction = "LSR.w"; break;
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case Operation::LSRl: instruction = "LSR.l"; break;
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case Operation::LSRm: instruction = "LSR.w"; break;
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case Operation::ROLb: instruction = "ROL.b"; break;
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case Operation::ROLw: instruction = "ROL.w"; break;
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case Operation::ROLl: instruction = "ROL.l"; break;
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case Operation::ROLm: instruction = "ROL.w"; break;
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case Operation::RORb: instruction = "ROR.b"; break;
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case Operation::RORw: instruction = "ROR.w"; break;
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case Operation::RORl: instruction = "ROR.l"; break;
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case Operation::RORm: instruction = "ROR.w"; break;
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case Operation::ROXLb: instruction = "ROXL.b"; break;
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case Operation::ROXLw: instruction = "ROXL.w"; break;
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case Operation::ROXLl: instruction = "ROXL.l"; break;
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case Operation::ROXLm: instruction = "ROXL.w"; break;
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case Operation::ROXRb: instruction = "ROXR.b"; break;
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case Operation::ROXRw: instruction = "ROXR.w"; break;
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case Operation::ROXRl: instruction = "ROXR.l"; break;
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case Operation::ROXRm: instruction = "ROXR.w"; break;
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case Operation::MOVEMtoMl: instruction = "MOVEM.l"; break;
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case Operation::MOVEMtoMw: instruction = "MOVEM.w"; break;
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case Operation::MOVEMtoRl:
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instruction = "MOVEM.l";
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flip_operands = true;
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break;
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case Operation::MOVEMtoRw:
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instruction = "MOVEM.w";
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flip_operands = true;
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break;
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case Operation::MOVEPl: instruction = "MOVEP.l"; break;
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case Operation::MOVEPw: instruction = "MOVEP.w"; break;
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case Operation::ANDb: instruction = "AND.b"; break;
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case Operation::ANDw: instruction = "AND.w"; break;
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case Operation::ANDl: instruction = "AND.l"; break;
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case Operation::EORb: instruction = "EOR.b"; break;
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case Operation::EORw: instruction = "EOR.w"; break;
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case Operation::EORl: instruction = "EOR.l"; break;
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case Operation::NOTb: instruction = "NOT.b"; break;
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case Operation::NOTw: instruction = "NOT.w"; break;
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case Operation::NOTl: instruction = "NOT.l"; break;
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case Operation::ORb: instruction = "OR.b"; break;
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case Operation::ORw: instruction = "OR.w"; break;
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case Operation::ORl: instruction = "OR.l"; break;
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case Operation::MULU: instruction = "MULU"; break;
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case Operation::MULS: instruction = "MULS"; break;
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case Operation::DIVU: instruction = "DIVU"; break;
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case Operation::DIVS: instruction = "DIVS"; break;
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case Operation::RTE: instruction = "RTE"; break;
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case Operation::RTR: instruction = "RTR"; break;
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case Operation::TRAP: instruction = "TRAP"; break;
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case Operation::TRAPV: instruction = "TRAPV"; break;
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case Operation::CHK: instruction = "CHK"; break;
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case Operation::EXG: instruction = "EXG"; break;
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case Operation::SWAP: instruction = "SWAP"; break;
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case Operation::TAS: instruction = "TAS"; break;
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case Operation::EXTbtow: instruction = "EXT.w"; break;
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case Operation::EXTwtol: instruction = "EXT.l"; break;
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case Operation::LINKw: instruction = "LINK"; break;
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case Operation::UNLINK: instruction = "UNLINK"; break;
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case Operation::STOP: instruction = "STOP"; break;
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case Operation::RESET: instruction = "RESET"; break;
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default:
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assert(false);
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}
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const std::string operand1 = operand_description(0 ^ int(flip_operands), opcode);
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const std::string operand2 = operand_description(1 ^ int(flip_operands), opcode);
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std::string result = instruction;
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if(!operand1.empty()) result += std::string(" ") + operand1;
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if(!operand2.empty()) result += std::string(", ") + operand2;
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return result;
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}
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@ -13,6 +13,7 @@
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#include <cassert>
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#include <cstdint>
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#include <string>
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namespace InstructionSet {
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namespace M68k {
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@ -308,6 +309,8 @@ class Preinstruction {
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uint8_t operands_[2] = { uint8_t(AddressingMode::None), uint8_t(AddressingMode::None)};
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uint8_t flags_ = 0;
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std::string operand_description(int index, int opcode) const;
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public:
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Preinstruction(
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Operation operation,
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@ -327,6 +330,11 @@ class Preinstruction {
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}
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Preinstruction() {}
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/// Produces a string description of this instruction; if @c opcode
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/// is supplied then any quick fields in this instruction will be decoded;
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/// otherwise they'll be printed as just 'Q'.
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std::string to_string(int opcode = -1) const;
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};
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}
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@ -131,6 +131,9 @@
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4B0ACC3223775819008902D0 /* Atari2600.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B0ACC2223775819008902D0 /* Atari2600.cpp */; };
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4B0ACC3323775819008902D0 /* Atari2600.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B0ACC2223775819008902D0 /* Atari2600.cpp */; };
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4B0CCC451C62D0B3001CAC5F /* CRT.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B0CCC421C62D0B3001CAC5F /* CRT.cpp */; };
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4B0DA67B282DCDF100C12F17 /* Instruction.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B0DA67A282DCC4200C12F17 /* Instruction.cpp */; };
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4B0DA67C282DCDF300C12F17 /* Instruction.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B0DA67A282DCC4200C12F17 /* Instruction.cpp */; };
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4B0DA67D282DCDF300C12F17 /* Instruction.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B0DA67A282DCC4200C12F17 /* Instruction.cpp */; };
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4B0E04EA1FC9E5DA00F43484 /* CAS.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B0E04E81FC9E5DA00F43484 /* CAS.cpp */; };
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4B0E04EB1FC9E78800F43484 /* CAS.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B0E04E81FC9E5DA00F43484 /* CAS.cpp */; };
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4B0E04F11FC9EA9500F43484 /* MSX.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B79A4FF1FC913C900EEDAD5 /* MSX.cpp */; };
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@ -1166,6 +1169,7 @@
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4B0ACC2523775819008902D0 /* TIA.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = TIA.hpp; sourceTree = "<group>"; };
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4B0CCC421C62D0B3001CAC5F /* CRT.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = CRT.cpp; sourceTree = "<group>"; };
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4B0CCC431C62D0B3001CAC5F /* CRT.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = CRT.hpp; sourceTree = "<group>"; };
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4B0DA67A282DCC4200C12F17 /* Instruction.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = Instruction.cpp; sourceTree = "<group>"; };
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4B0E04E81FC9E5DA00F43484 /* CAS.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = CAS.cpp; sourceTree = "<group>"; };
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4B0E04E91FC9E5DA00F43484 /* CAS.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = CAS.hpp; sourceTree = "<group>"; };
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4B0E04F81FC9FA3000F43484 /* 9918.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 9918.hpp; sourceTree = "<group>"; };
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@ -3201,6 +3205,7 @@
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isa = PBXGroup;
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children = (
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4B79629F2819681F008130F9 /* Decoder.cpp */,
|
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4B0DA67A282DCC4200C12F17 /* Instruction.cpp */,
|
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4B79629E2819681F008130F9 /* Decoder.hpp */,
|
||||
4B7C79FE282AFA9B002D6C0B /* ExceptionVectors.hpp */,
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4BB5B99C281C805300522DA9 /* Executor.hpp */,
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@ -5623,6 +5628,7 @@
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||||
4B47F6C6241C87A100ED06F7 /* Struct.cpp in Sources */,
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4B055AE01FAE9B660060FFFF /* CRT.cpp in Sources */,
|
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4B894527201967B4007DE474 /* StaticAnalyser.cpp in Sources */,
|
||||
4B0DA67C282DCDF300C12F17 /* Instruction.cpp in Sources */,
|
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4BB244D622AABAF600BE20E5 /* z8530.cpp in Sources */,
|
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4BAF2B4F2004580C00480230 /* DMK.cpp in Sources */,
|
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4B055AD01FAE9B030060FFFF /* Tape.cpp in Sources */,
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@ -5829,6 +5835,7 @@
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4BC080D926A25ADA00D03FD8 /* Amiga.cpp in Sources */,
|
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4B2B3A4B1F9B8FA70062DABF /* Typer.cpp in Sources */,
|
||||
4B4518821F75E91A00926311 /* PCMSegment.cpp in Sources */,
|
||||
4B0DA67B282DCDF100C12F17 /* Instruction.cpp in Sources */,
|
||||
4B74CF812312FA9C00500CE8 /* HFV.cpp in Sources */,
|
||||
4B17B58B20A8A9D9007CCA8F /* StringSerialiser.cpp in Sources */,
|
||||
4B2E2D9D1C3A070400138695 /* Electron.cpp in Sources */,
|
||||
@ -6039,6 +6046,7 @@
|
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4B7752B728217EF40073E2C5 /* Chipset.cpp in Sources */,
|
||||
4B778EFB23A5EB7E0000D260 /* HFE.cpp in Sources */,
|
||||
4BC751B21D157E61006C31D9 /* 6522Tests.swift in Sources */,
|
||||
4B0DA67D282DCDF300C12F17 /* Instruction.cpp in Sources */,
|
||||
4BFCA12B1ECBE7C400AC40C1 /* ZexallTests.swift in Sources */,
|
||||
4B778F2223A5EDDD0000D260 /* PulseQueuedTape.cpp in Sources */,
|
||||
4B778EF123A5D6B50000D260 /* 9918.cpp in Sources */,
|
||||
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@ -15,51 +15,6 @@ using namespace InstructionSet::M68k;
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@interface M68000DecoderTests : XCTestCase
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@end
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||||
namespace {
|
||||
|
||||
NSString *operand(Preinstruction instruction, uint16_t opcode, int index) {
|
||||
switch(instruction.mode(index)) {
|
||||
default: return [NSString stringWithFormat:@"[Mode %d?]", int(instruction.mode(index))];
|
||||
|
||||
case AddressingMode::None:
|
||||
return @"";
|
||||
|
||||
case AddressingMode::DataRegisterDirect:
|
||||
return [NSString stringWithFormat:@"D%d", instruction.reg(index)];
|
||||
|
||||
case AddressingMode::AddressRegisterDirect:
|
||||
return [NSString stringWithFormat:@"A%d", instruction.reg(index)];
|
||||
case AddressingMode::AddressRegisterIndirect:
|
||||
return [NSString stringWithFormat:@"(A%d)", instruction.reg(index)];
|
||||
case AddressingMode::AddressRegisterIndirectWithPostincrement:
|
||||
return [NSString stringWithFormat:@"(A%d)+", instruction.reg(index)];
|
||||
case AddressingMode::AddressRegisterIndirectWithPredecrement:
|
||||
return [NSString stringWithFormat:@"-(A%d)", instruction.reg(index)];
|
||||
case AddressingMode::AddressRegisterIndirectWithDisplacement:
|
||||
return [NSString stringWithFormat:@"(d16, A%d)", instruction.reg(index)];
|
||||
case AddressingMode::AddressRegisterIndirectWithIndex8bitDisplacement:
|
||||
return [NSString stringWithFormat:@"(d8, A%d, Xn)", instruction.reg(index)];
|
||||
|
||||
case AddressingMode::ProgramCounterIndirectWithDisplacement:
|
||||
return @"(d16, PC)";
|
||||
case AddressingMode::ProgramCounterIndirectWithIndex8bitDisplacement:
|
||||
return @"(d8, PC, Xn)";
|
||||
|
||||
case AddressingMode::AbsoluteShort:
|
||||
return @"(xxx).w";
|
||||
case AddressingMode::AbsoluteLong:
|
||||
return @"(xxx).l";
|
||||
|
||||
case AddressingMode::ImmediateData:
|
||||
return @"#";
|
||||
|
||||
case AddressingMode::Quick:
|
||||
return [NSString stringWithFormat:@"%d", quick(opcode, instruction.operation)];
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
@implementation M68000DecoderTests
|
||||
|
||||
- (void)testInstructionSpecs {
|
||||
@ -81,244 +36,7 @@ NSString *operand(Preinstruction instruction, uint16_t opcode, int index) {
|
||||
|
||||
const auto found = decoder.decode(uint16_t(instr));
|
||||
|
||||
NSString *instruction;
|
||||
bool flipOperands = false;
|
||||
switch(found.operation) {
|
||||
case Operation::Undefined: instruction = @"None"; break;
|
||||
case Operation::NOP: instruction = @"NOP"; break;
|
||||
case Operation::ABCD: instruction = @"ABCD"; break;
|
||||
case Operation::SBCD: instruction = @"SBCD"; break;
|
||||
case Operation::NBCD: instruction = @"NBCD"; break;
|
||||
|
||||
case Operation::ADDb: instruction = @"ADD.b"; break;
|
||||
case Operation::ADDw: instruction = @"ADD.w"; break;
|
||||
case Operation::ADDl: instruction = @"ADD.l"; break;
|
||||
|
||||
case Operation::ADDAw:
|
||||
if(found.mode<0>() == AddressingMode::Quick) {
|
||||
instruction = @"ADD.w";
|
||||
} else {
|
||||
instruction = @"ADDA.w";
|
||||
}
|
||||
break;
|
||||
case Operation::ADDAl:
|
||||
if(found.mode<0>() == AddressingMode::Quick) {
|
||||
instruction = @"ADD.l";
|
||||
} else {
|
||||
instruction = @"ADDA.l";
|
||||
}
|
||||
break;
|
||||
|
||||
case Operation::ADDXb: instruction = @"ADDX.b"; break;
|
||||
case Operation::ADDXw: instruction = @"ADDX.w"; break;
|
||||
case Operation::ADDXl: instruction = @"ADDX.l"; break;
|
||||
|
||||
case Operation::SUBb: instruction = @"SUB.b"; break;
|
||||
case Operation::SUBw: instruction = @"SUB.w"; break;
|
||||
case Operation::SUBl: instruction = @"SUB.l"; break;
|
||||
|
||||
case Operation::SUBAw:
|
||||
if(found.mode<0>() == AddressingMode::Quick) {
|
||||
instruction = @"SUB.w";
|
||||
} else {
|
||||
instruction = @"SUBA.w";
|
||||
}
|
||||
break;
|
||||
case Operation::SUBAl:
|
||||
if(found.mode<0>() == AddressingMode::Quick) {
|
||||
instruction = @"SUB.l";
|
||||
} else {
|
||||
instruction = @"SUBA.l";
|
||||
}
|
||||
break;
|
||||
|
||||
case Operation::SUBXb: instruction = @"SUBX.b"; break;
|
||||
case Operation::SUBXw: instruction = @"SUBX.w"; break;
|
||||
case Operation::SUBXl: instruction = @"SUBX.l"; break;
|
||||
|
||||
case Operation::MOVEb: instruction = @"MOVE.b"; break;
|
||||
case Operation::MOVEw: instruction = @"MOVE.w"; break;
|
||||
case Operation::MOVEl:
|
||||
if(found.mode<0>() == AddressingMode::Quick) {
|
||||
instruction = @"MOVE.q";
|
||||
} else {
|
||||
instruction = @"MOVE.l";
|
||||
}
|
||||
break;
|
||||
|
||||
case Operation::MOVEAw: instruction = @"MOVEA.w"; break;
|
||||
case Operation::MOVEAl: instruction = @"MOVEA.l"; break;
|
||||
|
||||
case Operation::LEA: instruction = @"LEA"; break;
|
||||
case Operation::PEA: instruction = @"PEA"; break;
|
||||
|
||||
case Operation::MOVEtoSR: instruction = @"MOVEtoSR"; break;
|
||||
case Operation::MOVEfromSR: instruction = @"MOVEfromSR"; break;
|
||||
case Operation::MOVEtoCCR: instruction = @"MOVEtoCCR"; break;
|
||||
case Operation::MOVEtoUSP: instruction = @"MOVEtoUSP"; break;
|
||||
case Operation::MOVEfromUSP: instruction = @"MOVEfromUSP"; break;
|
||||
|
||||
case Operation::ORItoSR: instruction = @"ORItoSR"; break;
|
||||
case Operation::ORItoCCR: instruction = @"ORItoCCR"; break;
|
||||
case Operation::ANDItoSR: instruction = @"ANDItoSR"; break;
|
||||
case Operation::ANDItoCCR: instruction = @"ANDItoCCR"; break;
|
||||
case Operation::EORItoSR: instruction = @"EORItoSR"; break;
|
||||
case Operation::EORItoCCR: instruction = @"EORItoCCR"; break;
|
||||
|
||||
case Operation::BTST: instruction = @"BTST"; break;
|
||||
case Operation::BCLR: instruction = @"BCLR"; break;
|
||||
case Operation::BCHG: instruction = @"BCHG"; break;
|
||||
case Operation::BSET: instruction = @"BSET"; break;
|
||||
|
||||
case Operation::CMPb: instruction = @"CMP.b"; break;
|
||||
case Operation::CMPw: instruction = @"CMP.w"; break;
|
||||
case Operation::CMPl: instruction = @"CMP.l"; break;
|
||||
|
||||
case Operation::CMPAw: instruction = @"CMPA.w"; break;
|
||||
case Operation::CMPAl: instruction = @"CMPA.l"; break;
|
||||
|
||||
case Operation::TSTb: instruction = @"TST.b"; break;
|
||||
case Operation::TSTw: instruction = @"TST.w"; break;
|
||||
case Operation::TSTl: instruction = @"TST.l"; break;
|
||||
|
||||
case Operation::JMP: instruction = @"JMP"; break;
|
||||
case Operation::JSR: instruction = @"JSR"; break;
|
||||
case Operation::RTS: instruction = @"RTS"; break;
|
||||
case Operation::DBcc: instruction = @"DBcc"; break;
|
||||
case Operation::Scc: instruction = @"Scc"; break;
|
||||
|
||||
case Operation::Bccb:
|
||||
case Operation::Bccl:
|
||||
case Operation::Bccw: instruction = @"Bcc"; break;
|
||||
|
||||
case Operation::BSRb:
|
||||
case Operation::BSRl:
|
||||
case Operation::BSRw: instruction = @"BSR"; break;
|
||||
|
||||
case Operation::CLRb: instruction = @"CLR.b"; break;
|
||||
case Operation::CLRw: instruction = @"CLR.w"; break;
|
||||
case Operation::CLRl: instruction = @"CLR.l"; break;
|
||||
|
||||
case Operation::NEGXb: instruction = @"NEGX.b"; break;
|
||||
case Operation::NEGXw: instruction = @"NEGX.w"; break;
|
||||
case Operation::NEGXl: instruction = @"NEGX.l"; break;
|
||||
|
||||
case Operation::NEGb: instruction = @"NEG.b"; break;
|
||||
case Operation::NEGw: instruction = @"NEG.w"; break;
|
||||
case Operation::NEGl: instruction = @"NEG.l"; break;
|
||||
|
||||
case Operation::ASLb: instruction = @"ASL.b"; break;
|
||||
case Operation::ASLw: instruction = @"ASL.w"; break;
|
||||
case Operation::ASLl: instruction = @"ASL.l"; break;
|
||||
case Operation::ASLm: instruction = @"ASL.w"; break;
|
||||
|
||||
case Operation::ASRb: instruction = @"ASR.b"; break;
|
||||
case Operation::ASRw: instruction = @"ASR.w"; break;
|
||||
case Operation::ASRl: instruction = @"ASR.l"; break;
|
||||
case Operation::ASRm: instruction = @"ASR.w"; break;
|
||||
|
||||
case Operation::LSLb: instruction = @"LSL.b"; break;
|
||||
case Operation::LSLw: instruction = @"LSL.w"; break;
|
||||
case Operation::LSLl: instruction = @"LSL.l"; break;
|
||||
case Operation::LSLm: instruction = @"LSL.w"; break;
|
||||
|
||||
case Operation::LSRb: instruction = @"LSR.b"; break;
|
||||
case Operation::LSRw: instruction = @"LSR.w"; break;
|
||||
case Operation::LSRl: instruction = @"LSR.l"; break;
|
||||
case Operation::LSRm: instruction = @"LSR.w"; break;
|
||||
|
||||
case Operation::ROLb: instruction = @"ROL.b"; break;
|
||||
case Operation::ROLw: instruction = @"ROL.w"; break;
|
||||
case Operation::ROLl: instruction = @"ROL.l"; break;
|
||||
case Operation::ROLm: instruction = @"ROL.w"; break;
|
||||
|
||||
case Operation::RORb: instruction = @"ROR.b"; break;
|
||||
case Operation::RORw: instruction = @"ROR.w"; break;
|
||||
case Operation::RORl: instruction = @"ROR.l"; break;
|
||||
case Operation::RORm: instruction = @"ROR.w"; break;
|
||||
|
||||
case Operation::ROXLb: instruction = @"ROXL.b"; break;
|
||||
case Operation::ROXLw: instruction = @"ROXL.w"; break;
|
||||
case Operation::ROXLl: instruction = @"ROXL.l"; break;
|
||||
case Operation::ROXLm: instruction = @"ROXL.w"; break;
|
||||
|
||||
case Operation::ROXRb: instruction = @"ROXR.b"; break;
|
||||
case Operation::ROXRw: instruction = @"ROXR.w"; break;
|
||||
case Operation::ROXRl: instruction = @"ROXR.l"; break;
|
||||
case Operation::ROXRm: instruction = @"ROXR.w"; break;
|
||||
|
||||
case Operation::MOVEMtoMl: instruction = @"MOVEM.l"; break;
|
||||
case Operation::MOVEMtoMw: instruction = @"MOVEM.w"; break;
|
||||
case Operation::MOVEMtoRl:
|
||||
instruction = @"MOVEM.l";
|
||||
flipOperands = true;
|
||||
break;
|
||||
case Operation::MOVEMtoRw:
|
||||
instruction = @"MOVEM.w";
|
||||
flipOperands = true;
|
||||
break;
|
||||
|
||||
case Operation::MOVEPl: instruction = @"MOVEP.l"; break;
|
||||
case Operation::MOVEPw: instruction = @"MOVEP.w"; break;
|
||||
|
||||
case Operation::ANDb: instruction = @"AND.b"; break;
|
||||
case Operation::ANDw: instruction = @"AND.w"; break;
|
||||
case Operation::ANDl: instruction = @"AND.l"; break;
|
||||
|
||||
case Operation::EORb: instruction = @"EOR.b"; break;
|
||||
case Operation::EORw: instruction = @"EOR.w"; break;
|
||||
case Operation::EORl: instruction = @"EOR.l"; break;
|
||||
|
||||
case Operation::NOTb: instruction = @"NOT.b"; break;
|
||||
case Operation::NOTw: instruction = @"NOT.w"; break;
|
||||
case Operation::NOTl: instruction = @"NOT.l"; break;
|
||||
|
||||
case Operation::ORb: instruction = @"OR.b"; break;
|
||||
case Operation::ORw: instruction = @"OR.w"; break;
|
||||
case Operation::ORl: instruction = @"OR.l"; break;
|
||||
|
||||
case Operation::MULU: instruction = @"MULU"; break;
|
||||
case Operation::MULS: instruction = @"MULS"; break;
|
||||
case Operation::DIVU: instruction = @"DIVU"; break;
|
||||
case Operation::DIVS: instruction = @"DIVS"; break;
|
||||
|
||||
case Operation::RTE: instruction = @"RTE"; break;
|
||||
case Operation::RTR: instruction = @"RTR"; break;
|
||||
|
||||
case Operation::TRAP: instruction = @"TRAP"; break;
|
||||
case Operation::TRAPV: instruction = @"TRAPV"; break;
|
||||
case Operation::CHK: instruction = @"CHK"; break;
|
||||
|
||||
case Operation::EXG: instruction = @"EXG"; break;
|
||||
case Operation::SWAP: instruction = @"SWAP"; break;
|
||||
|
||||
case Operation::TAS: instruction = @"TAS"; break;
|
||||
|
||||
case Operation::EXTbtow: instruction = @"EXT.w"; break;
|
||||
case Operation::EXTwtol: instruction = @"EXT.l"; break;
|
||||
|
||||
case Operation::LINKw: instruction = @"LINK"; break;
|
||||
case Operation::UNLINK: instruction = @"UNLINK"; break;
|
||||
|
||||
case Operation::STOP: instruction = @"STOP"; break;
|
||||
case Operation::RESET: instruction = @"RESET"; break;
|
||||
|
||||
// For now, skip any unmapped operations.
|
||||
default:
|
||||
XCTAssert(false, @"Operation %d unhandled by test case", int(found.operation));
|
||||
continue;
|
||||
}
|
||||
|
||||
NSString *const operand1 = operand(found, uint16_t(instr), 0 ^ int(flipOperands));
|
||||
NSString *const operand2 = operand(found, uint16_t(instr), 1 ^ int(flipOperands));
|
||||
|
||||
if(operand1.length) instruction = [instruction stringByAppendingFormat:@" %@", operand1];
|
||||
if(operand2.length) instruction = [instruction stringByAppendingFormat:@", %@", operand2];
|
||||
|
||||
XCTAssertFalse(
|
||||
found.mode(0 ^ int(flipOperands)) == AddressingMode::None &&
|
||||
found.mode(1 ^ int(flipOperands)) != AddressingMode::None,
|
||||
@"Decoding of %@ provided a second operand but not a first", instrName);
|
||||
NSString *const instruction = [NSString stringWithUTF8String:found.to_string(instr).c_str()];
|
||||
XCTAssertEqualObjects(instruction, expected, "%@ should decode as %@; got %@", instrName, expected, instruction);
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user