diff --git a/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift b/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift
index f884413d2..71a82f171 100644
--- a/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift	
+++ b/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift	
@@ -72,6 +72,10 @@ class KlausDormannTests: XCTestCase {
 				case 0x0437: return "PLY: stack pointer not incremented"
 				case 0x043c: return "PLY: stack pointer not incremented"
 
+				case 0x066a: return "BRA: branch not taken"
+				case 0x0730: return "BBS: branch not taken"
+				case 0x0733: return "BBR: branch taken"
+
 				case 0: return "Didn't find tests"
 				default: return "Unknown error at \(String(format:"%04x", address))"
 			}
diff --git a/Processors/6502/Implementation/6502Implementation.hpp b/Processors/6502/Implementation/6502Implementation.hpp
index 6761da892..043534991 100644
--- a/Processors/6502/Implementation/6502Implementation.hpp
+++ b/Processors/6502/Implementation/6502Implementation.hpp
@@ -470,6 +470,7 @@ if(number_of_cycles <= Cycles(0)) break;
 					case OperationBCS: BRA(carry_flag_);							continue;
 					case OperationBNE: BRA(zero_result_);							continue;
 					case OperationBEQ: BRA(!zero_result_);							continue;
+					case OperationBRA: BRA(true);									continue;
 
 					case CycleAddSignedOperandToPC:
 						nextAddress.full = static_cast<uint16_t>(pc_.full + (int8_t)operand_);
diff --git a/Processors/6502/Implementation/6502Storage.cpp b/Processors/6502/Implementation/6502Storage.cpp
index 7dd903629..31efd30e4 100644
--- a/Processors/6502/Implementation/6502Storage.cpp
+++ b/Processors/6502/Implementation/6502Storage.cpp
@@ -76,7 +76,9 @@ ProcessorStorage::ProcessorStorage(Personality personality) {
 	decimal_flag_ &= Flag::Decimal;
 	overflow_flag_ &= Flag::Overflow;
 
-	const ProcessorStorage::MicroOp operations_6502[256][10] = {
+	using InstructionList = ProcessorStorage::MicroOp[10];
+
+	const InstructionList operations_6502[256] = {
 		/* 0x00 BRK */			Program(CycleIncPCPushPCH, CyclePushPCL, OperationBRKPickVector, OperationSetOperandFromFlagsWithBRKSet, CyclePushOperand, OperationSetI, CycleReadVectorLow, CycleReadVectorHigh),
 		/* 0x01 ORA x, ind */	IndexedIndirectRead(OperationORA),
 		/* 0x02 JAM */			JAM,																	/* 0x03 ASO x, ind */	IndexedIndirectReadModifyWrite(OperationASO),
@@ -218,18 +220,24 @@ ProcessorStorage::ProcessorStorage(Personality personality) {
 	memcpy(operations_, operations_6502, sizeof(operations_));
 
 	// Patch the table according to the chip's personality.
+#define Install(location, code) memcpy(&operations_[location], code, sizeof(InstructionList))
 	if(personality != P6502) {
-		// This is a 65C02 or 65SC02; add P[L/H][X/Y]
-		const ProcessorStorage::MicroOp phx[10] = Program(CyclePushX);
-		const ProcessorStorage::MicroOp phy[10] = Program(CyclePushY);
-		const ProcessorStorage::MicroOp plx[10] = Program(CycleReadFromS, CyclePullX, OperationSetFlagsFromX);
-		const ProcessorStorage::MicroOp ply[10] = Program(CycleReadFromS, CyclePullY, OperationSetFlagsFromY);
+		// Add P[L/H][X/Y].
+		const InstructionList phx = Program(CyclePushX);
+		const InstructionList phy = Program(CyclePushY);
+		const InstructionList plx = Program(CycleReadFromS, CyclePullX, OperationSetFlagsFromX);
+		const InstructionList ply = Program(CycleReadFromS, CyclePullY, OperationSetFlagsFromY);
 
-		memcpy(&operations_[0x5a], phy, sizeof(phy));
-		memcpy(&operations_[0xda], phx, sizeof(phx));
-		memcpy(&operations_[0x7a], ply, sizeof(ply));
-		memcpy(&operations_[0xfa], plx, sizeof(plx));
+		Install(0x5a, phy);
+		Install(0xda, phx);
+		Install(0x7a, ply);
+		Install(0xfa, plx);
+
+		// Add BRA and the various BBS and BBRs.
+		const InstructionList bra = Program(OperationBRA);
+		Install(0x80, bra);
 	}
+#undef Install
 }
 
 #undef Program
diff --git a/Processors/6502/Implementation/6502Storage.hpp b/Processors/6502/Implementation/6502Storage.hpp
index a9265ef6f..bb9a06d83 100644
--- a/Processors/6502/Implementation/6502Storage.hpp
+++ b/Processors/6502/Implementation/6502Storage.hpp
@@ -54,10 +54,11 @@ class ProcessorStorage {
 			OperationDEC,								OperationINX,						OperationDEX,							OperationINY,
 			OperationDEY,								OperationBPL,						OperationBMI,							OperationBVC,
 			OperationBVS,								OperationBCC,						OperationBCS,							OperationBNE,
-			OperationBEQ,								OperationTXA,						OperationTYA,							OperationTXS,
-			OperationTAY,								OperationTAX,						OperationTSX,							OperationARR,
-			OperationSBX,								OperationLXA,						OperationANE,							OperationANC,
-			OperationLAS,								CycleAddSignedOperandToPC,			OperationSetFlagsFromOperand,			OperationSetOperandFromFlagsWithBRKSet,
+			OperationBEQ,								OperationBRA,						OperationTXA,							OperationTYA,
+			OperationTXS,								OperationTAY,						OperationTAX,							OperationTSX,
+			OperationARR,								OperationSBX,						OperationLXA,							OperationANE,
+			OperationANC,								OperationLAS,
+			CycleAddSignedOperandToPC,					OperationSetFlagsFromOperand,		OperationSetOperandFromFlagsWithBRKSet,
 			OperationSetOperandFromFlags,
 			OperationSetFlagsFromA,						OperationSetFlagsFromX,				OperationSetFlagsFromY,
 			CycleScheduleJam