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Fixed: paging is based directly on the access, independent of the read/write line (since it isn't actually exposed to catridges).
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@ -269,9 +269,7 @@ int Machine::perform_bus_operation(CPU6502::BusOperation operation, uint16_t add
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if(operation != CPU6502::BusOperation::Ready) {
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// check for a ROM or paging access
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if ((address&0x1000) && isReadOperation(operation)) {
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// check for a paging access
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if(_rom_size > 4096 && ((address & 0x1f00) == 0x1f00)) {
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uint8_t *base_ptr = _romPages[0];
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uint8_t first_paging_register = 0xf8 - (_rom_size >> 14)*2;
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@ -292,6 +290,8 @@ int Machine::perform_bus_operation(CPU6502::BusOperation operation, uint16_t add
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}
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}
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// check for a ROM read
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if ((address&0x1000) && isReadOperation(operation)) {
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returnValue &= _romPages[(address >> 10)&3][address&1023];
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}
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