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https://github.com/TomHarte/CLK.git
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commit
35f000f93c
@ -35,6 +35,9 @@ class RTC {
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switch(selected_) {
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default:
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if(ram_selected()) {
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return ram_[ram_address()];
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}
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return 0xff;
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case 0x00: return bcd(time_date->tm_sec); // Seconds [0-59]
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@ -57,20 +60,38 @@ class RTC {
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case 0x09: return bcd(time_date->tm_year % 100); // Year [0-99]
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case 0x32: return bcd(19 + time_date->tm_year / 100); // Century
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case 0x0a: return statusA_;
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case 0x0a: return statusA_ & 0x7f; // Exclude the update-in-progress bit.
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case 0x0b: return statusB_;
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}
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}
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private:
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int selected_;
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std::size_t selected_;
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std::array<uint8_t, 50> ram_{};
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uint8_t statusA_ = 0x00;
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uint8_t statusB_ = 0x02;
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// Status A.
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// b7: update-in-progress.
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// b6–b4: selects condition of the divider chain (?);
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// b3–b0: selects rate of the divider chain.
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// Status B.
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bool disable_updates() const { return statusB_ & 0x80; }
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bool periodic_interrupt_enabled() const { return statusB_ & 0x40; }
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bool alarm_interrupt_enabled() const { return statusB_ & 0x20; }
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bool update_ended_interrupt_enabled() const { return statusB_ & 0x10; }
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bool square_wave_enabled() const { return statusB_ & 0x08; }
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bool is_decimal() const { return statusB_ & 0x04; }
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bool is_24hour() const { return statusB_ & 0x02; }
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bool daylight_savings_enabled() const { return statusB_ & 0x01; }
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// Helpers for differentiating RAM accesses from the more meaningful registers.
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bool ram_selected() const { return selected_ >= 0xe && selected_ < 0xe + ram_.size(); }
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std::size_t ram_address() const { return selected_ - 0xe; }
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/// Converts @c input to BCD if BCD mode is enabled; otherwise returns @c input unaltered.
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template <typename IntT>
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uint8_t bcd(IntT input) {
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// If calendar is in binary format, don't convert.
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@ -85,9 +106,14 @@ class RTC {
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);
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}
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/// Writes @c value to the register @c selected_ .
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void write_register(uint8_t value) {
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switch(selected_) {
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default: break;
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default:
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if(ram_selected()) {
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ram_[ram_address()] = value;
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}
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break;
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case 0x0a: statusA_ = value; break;
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case 0x0b: statusB_ = value; break;
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}
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