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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-23 03:32:32 +00:00

Switched to clocking the 6522 by the half-cycle. Very trivial test now passes.

This commit is contained in:
Thomas Harte 2016-06-18 13:57:10 -04:00
parent 06fb2ff1c7
commit 394902f409
4 changed files with 54 additions and 24 deletions

View File

@ -144,10 +144,14 @@ template <class T> class MOS6522 {
{ {
} }
void run_for_cycles(unsigned int number_of_cycles) void run_for_half_cycles(unsigned int number_of_cycles)
{ {
_registers.timer[0] -= number_of_cycles; while(number_of_cycles--)
_registers.timer[1] -= number_of_cycles; {
if(_is_phase2)
{
_registers.timer[0] --;
_registers.timer[1] --;
if(!_registers.timer[1] && _timer_is_running[1]) if(!_registers.timer[1] && _timer_is_running[1])
{ {
@ -170,6 +174,10 @@ template <class T> class MOS6522 {
// TODO: lots of other status effects // TODO: lots of other status effects
} }
_is_phase2 ^= true;
}
}
bool get_interrupt_line() bool get_interrupt_line()
{ {
uint8_t interrupt_status = _registers.interrupt_flags & _registers.interrupt_enable & 0x7f; uint8_t interrupt_status = _registers.interrupt_flags & _registers.interrupt_enable & 0x7f;
@ -178,13 +186,18 @@ template <class T> class MOS6522 {
MOS6522() : MOS6522() :
_timer_is_running{false, false}, _timer_is_running{false, false},
_last_posted_interrupt_status(false) _last_posted_interrupt_status(false),
_is_phase2(false)
{} {}
private: private:
// Intended to be overwritten // Intended to be overridden
uint8_t get_port_input(int port) { return 0xff; } uint8_t get_port_input(int port) { return 0xff; }
void set_port_output(int port, uint8_t value) {} void set_port_output(int port, uint8_t value) {}
// void set_interrupt_status(bool status) {}
// Phase toggle
bool _is_phase2;
// Delegate and communications // Delegate and communications
bool _last_posted_interrupt_status; bool _last_posted_interrupt_status;

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@ -79,8 +79,8 @@ unsigned int Machine::perform_bus_operation(CPU6502::BusOperation operation, uin
} }
} }
_userPortVIA.run_for_cycles(1); _userPortVIA.run_for_half_cycles(2);
_keyboardVIA.run_for_cycles(1); _keyboardVIA.run_for_half_cycles(2);
return 1; return 1;
} }

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@ -10,4 +10,21 @@ import XCTest
import Foundation import Foundation
class MOS6522Tests: XCTestCase { class MOS6522Tests: XCTestCase {
private func with6522(action: (MOS6522Bridge) -> ()) {
let bridge = MOS6522Bridge()
action(bridge)
}
func testTimerCount() {
with6522 {
$0.setValue(10, forRegister: 4)
$0.setValue(0, forRegister: 5)
$0.runForHalfCycles(10)
XCTAssert($0.valueForRegister(4) == 5, "Low order byte of timer should be 5; was \($0.valueForRegister(4))")
XCTAssert($0.valueForRegister(5) == 0, "High order byte of timer should be 5; was \($0.valueForRegister(5))")
}
}
} }

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@ -49,7 +49,7 @@ class VanillaVIA: public MOS::MOS6522<VanillaVIA> {
- (void)runForHalfCycles:(NSUInteger)numberOfHalfCycles - (void)runForHalfCycles:(NSUInteger)numberOfHalfCycles
{ {
_via.run_for_cycles(numberOfHalfCycles); _via.run_for_half_cycles(numberOfHalfCycles);
} }
@end @end