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https://github.com/TomHarte/CLK.git
synced 2024-11-26 23:52:26 +00:00
Switched to clocking the 6522 by the half-cycle. Very trivial test now passes.
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@ -144,30 +144,38 @@ template <class T> class MOS6522 {
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{
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}
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void run_for_cycles(unsigned int number_of_cycles)
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void run_for_half_cycles(unsigned int number_of_cycles)
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{
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_registers.timer[0] -= number_of_cycles;
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_registers.timer[1] -= number_of_cycles;
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if(!_registers.timer[1] && _timer_is_running[1])
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while(number_of_cycles--)
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{
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_timer_is_running[1] = false;
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_registers.interrupt_flags |= InterruptFlag::Timer2;
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reevaluate_interrupts();
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}
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if(_is_phase2)
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{
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_registers.timer[0] --;
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_registers.timer[1] --;
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if(!_registers.timer[0] && _timer_is_running[0])
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{
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_registers.interrupt_flags |= InterruptFlag::Timer1;
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reevaluate_interrupts();
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if(!_registers.timer[1] && _timer_is_running[1])
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{
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_timer_is_running[1] = false;
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_registers.interrupt_flags |= InterruptFlag::Timer2;
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reevaluate_interrupts();
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}
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// TODO: reload shouldn't occur for a further 1.5 cycles
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if(_registers.auxiliary_control&0x40)
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_registers.timer[0] = _registers.timer_latch[0];
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else
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_timer_is_running[0] = false;
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if(!_registers.timer[0] && _timer_is_running[0])
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{
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_registers.interrupt_flags |= InterruptFlag::Timer1;
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reevaluate_interrupts();
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// TODO: reload shouldn't occur for a further 1.5 cycles
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if(_registers.auxiliary_control&0x40)
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_registers.timer[0] = _registers.timer_latch[0];
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else
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_timer_is_running[0] = false;
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}
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// TODO: lots of other status effects
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}
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_is_phase2 ^= true;
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}
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// TODO: lots of other status effects
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}
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bool get_interrupt_line()
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@ -178,13 +186,18 @@ template <class T> class MOS6522 {
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MOS6522() :
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_timer_is_running{false, false},
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_last_posted_interrupt_status(false)
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_last_posted_interrupt_status(false),
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_is_phase2(false)
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{}
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private:
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// Intended to be overwritten
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// Intended to be overridden
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uint8_t get_port_input(int port) { return 0xff; }
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void set_port_output(int port, uint8_t value) {}
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// void set_interrupt_status(bool status) {}
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// Phase toggle
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bool _is_phase2;
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// Delegate and communications
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bool _last_posted_interrupt_status;
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@ -79,8 +79,8 @@ unsigned int Machine::perform_bus_operation(CPU6502::BusOperation operation, uin
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}
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}
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_userPortVIA.run_for_cycles(1);
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_keyboardVIA.run_for_cycles(1);
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_userPortVIA.run_for_half_cycles(2);
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_keyboardVIA.run_for_half_cycles(2);
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return 1;
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}
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@ -10,4 +10,21 @@ import XCTest
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import Foundation
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class MOS6522Tests: XCTestCase {
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private func with6522(action: (MOS6522Bridge) -> ()) {
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let bridge = MOS6522Bridge()
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action(bridge)
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}
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func testTimerCount() {
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with6522 {
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$0.setValue(10, forRegister: 4)
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$0.setValue(0, forRegister: 5)
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$0.runForHalfCycles(10)
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XCTAssert($0.valueForRegister(4) == 5, "Low order byte of timer should be 5; was \($0.valueForRegister(4))")
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XCTAssert($0.valueForRegister(5) == 0, "High order byte of timer should be 5; was \($0.valueForRegister(5))")
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}
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}
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}
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@ -49,7 +49,7 @@ class VanillaVIA: public MOS::MOS6522<VanillaVIA> {
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- (void)runForHalfCycles:(NSUInteger)numberOfHalfCycles
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{
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_via.run_for_cycles(numberOfHalfCycles);
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_via.run_for_half_cycles(numberOfHalfCycles);
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}
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@end
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