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https://github.com/TomHarte/CLK.git
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Remove dead DataPointerResolver and extra-conditional version of source().
This commit is contained in:
Thomas Harte
parent
0c09c14baa
commit
3b62638b30
@ -1,325 +0,0 @@
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//
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// DataPointerResolver.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 24/02/2022.
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// Copyright © 2022 Thomas Harte. All rights reserved.
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//
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#ifndef DataPointerResolver_hpp
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#define DataPointerResolver_hpp
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#include "Instruction.hpp"
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#include "Model.hpp"
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#include <cassert>
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namespace InstructionSet::x86 {
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/// Unlike source, describes only registers, and breaks
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/// them down by conventional name — so AL, AH, AX and EAX are all
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/// listed separately and uniquely, rather than being eAX+size or
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/// eSPorAH with a size of 1.
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enum class Register: uint8_t {
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// 8-bit registers.
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AL, AH,
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CL, CH,
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DL, DH,
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BL, BH,
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// 16-bit registers.
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AX, CX, DX, BX,
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SP, BP, SI, DI,
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ES, CS, SS, DS,
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FS, GS,
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// 32-bit registers.
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EAX, ECX, EDX, EBX,
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ESP, EBP, ESI, EDI,
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//
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None
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};
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/// @returns @c true if @c r is the same size as @c DataT; @c false otherwise.
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/// @discussion Provided primarily to aid in asserts; if the decoder and resolver are both
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/// working then it shouldn't be necessary to test this in register files.
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template <typename DataT> constexpr bool is_sized(Register r) {
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static_assert(sizeof(DataT) == 4 || sizeof(DataT) == 2 || sizeof(DataT) == 1);
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if constexpr (sizeof(DataT) == 4) {
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return r >= Register::EAX && r < Register::None;
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}
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if constexpr (sizeof(DataT) == 2) {
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return r >= Register::AX && r < Register::EAX;
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}
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if constexpr (sizeof(DataT) == 1) {
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return r >= Register::AL && r < Register::AX;
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}
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return false;
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}
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/// @returns the proper @c Register given @c source and data of size @c sizeof(DataT),
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/// or Register::None if no such register exists (e.g. asking for a 32-bit version of CS).
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template <typename DataT> constexpr Register register_for_source(Source source) {
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static_assert(sizeof(DataT) == 4 || sizeof(DataT) == 2 || sizeof(DataT) == 1);
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if constexpr (sizeof(DataT) == 4) {
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switch(source) {
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case Source::eAX: return Register::EAX;
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case Source::eCX: return Register::ECX;
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case Source::eDX: return Register::EDX;
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case Source::eBX: return Register::EBX;
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case Source::eSPorAH: return Register::ESP;
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case Source::eBPorCH: return Register::EBP;
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case Source::eSIorDH: return Register::ESI;
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case Source::eDIorBH: return Register::EDI;
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default: break;
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}
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}
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if constexpr (sizeof(DataT) == 2) {
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switch(source) {
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case Source::eAX: return Register::AX;
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case Source::eCX: return Register::CX;
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case Source::eDX: return Register::DX;
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case Source::eBX: return Register::BX;
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case Source::eSPorAH: return Register::SP;
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case Source::eBPorCH: return Register::BP;
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case Source::eSIorDH: return Register::SI;
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case Source::eDIorBH: return Register::DI;
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case Source::ES: return Register::ES;
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case Source::CS: return Register::CS;
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case Source::SS: return Register::SS;
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case Source::DS: return Register::DS;
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case Source::FS: return Register::FS;
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case Source::GS: return Register::GS;
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default: break;
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}
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}
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if constexpr (sizeof(DataT) == 1) {
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switch(source) {
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case Source::eAX: return Register::AL;
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case Source::eCX: return Register::CL;
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case Source::eDX: return Register::DL;
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case Source::eBX: return Register::BL;
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case Source::eSPorAH: return Register::AH;
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case Source::eBPorCH: return Register::CH;
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case Source::eSIorDH: return Register::DH;
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case Source::eDIorBH: return Register::BH;
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default: break;
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}
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}
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return Register::None;
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}
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/// Reads from or writes to the source or target identified by a DataPointer, relying upon two user-supplied classes:
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///
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/// * a register bank; and
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/// * a memory pool.
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///
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/// The register bank should implement:
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/// * `template<typename DataT, Register> DataT read()` and
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/// * `template<typename DataT, Register> void write(DataT)`.
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///
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/// Which will be called only with registers and data types that are appropriate to the @c model.
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///
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/// The memory pool should implement `template<typename DataT> DataT read(Source segment, uint32_t address)` and
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/// `template<typename DataT> void write(Source segment, uint32_t address, DataT value)`.
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template <Model model, typename RegistersT, typename MemoryT> class DataPointerResolver {
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public:
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public:
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/// Reads the data pointed to by @c pointer, referencing @c instruction, @c memory and @c registers as necessary.
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template <typename DataT> static DataT read(
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RegistersT ®isters,
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MemoryT &memory,
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const Instruction<is_32bit(model)> &instruction,
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DataPointer pointer);
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/// Writes @c value to the data pointed to by @c pointer, referencing @c instruction, @c memory and @c registers as necessary.
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template <typename DataT> static void write(
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RegistersT ®isters,
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MemoryT &memory,
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const Instruction<is_32bit(model)> &instruction,
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DataPointer pointer,
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DataT value);
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/// Computes the effective address of @c pointer including any displacement applied by @c instruction.
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/// @c pointer must be of type Source::Indirect.
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template <bool obscured_indirectNoBase = true, bool has_base = true>
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static uint32_t effective_address(
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RegistersT ®isters,
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const Instruction<is_32bit(model)> &instruction,
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DataPointer pointer);
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private:
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template <bool is_write, typename DataT> static void access(
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RegistersT ®isters,
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MemoryT &memory,
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const Instruction<is_32bit(model)> &instruction,
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DataPointer pointer,
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DataT &value);
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};
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//
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// Implementation begins here.
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//
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template <Model model, typename RegistersT, typename MemoryT>
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template <typename DataT> DataT DataPointerResolver<model, RegistersT, MemoryT>::read(
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RegistersT ®isters,
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MemoryT &memory,
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const Instruction<is_32bit(model)> &instruction,
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DataPointer pointer) {
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DataT result;
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access<false>(registers, memory, instruction, pointer, result);
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return result;
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}
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template <Model model, typename RegistersT, typename MemoryT>
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template <typename DataT> void DataPointerResolver<model, RegistersT, MemoryT>::write(
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RegistersT ®isters,
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MemoryT &memory,
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const Instruction<is_32bit(model)> &instruction,
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DataPointer pointer,
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DataT value) {
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access<true>(registers, memory, instruction, pointer, value);
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}
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#define rw(v, r, is_write) \
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case Source::r: \
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using VType = typename std::remove_reference<decltype(v)>::type; \
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if constexpr (is_write) { \
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registers.template write<VType, register_for_source<VType>(Source::r)>(v); \
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} else { \
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v = registers.template read<VType, register_for_source<VType>(Source::r)>(); \
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} \
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break;
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#define ALLREGS(v, i) rw(v, eAX, i); rw(v, eCX, i); \
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rw(v, eDX, i); rw(v, eBX, i); \
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rw(v, eSPorAH, i); rw(v, eBPorCH, i); \
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rw(v, eSIorDH, i); rw(v, eDIorBH, i); \
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rw(v, ES, i); rw(v, CS, i); \
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rw(v, SS, i); rw(v, DS, i); \
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rw(v, FS, i); rw(v, GS, i);
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template <Model model, typename RegistersT, typename MemoryT>
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template <bool obscured_indirectNoBase, bool has_base>
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uint32_t DataPointerResolver<model, RegistersT, MemoryT>::effective_address(
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RegistersT ®isters,
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const Instruction<is_32bit(model)> &instruction,
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DataPointer pointer
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) {
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using AddressT = typename Instruction<is_32bit(model)>::AddressT;
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AddressT base = 0, index = 0;
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if constexpr (has_base) {
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switch(pointer.base<obscured_indirectNoBase>()) {
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default: break;
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ALLREGS(base, false);
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}
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}
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switch(pointer.index()) {
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default: break;
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ALLREGS(index, false);
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}
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uint32_t address = index;
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if constexpr (model >= Model::i80386) {
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address <<= pointer.scale();
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} else {
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assert(!pointer.scale());
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}
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// Always compute address as 32-bit.
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// TODO: verify use of memory_mask around here.
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// Also I think possibly an exception is supposed to be generated
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// if the programmer is in 32-bit mode and has asked for 16-bit
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// address computation but generated e.g. a 17-bit result. Look into
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// that when working on execution. For now the goal is merely decoding
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// and this code exists both to verify the presence of all necessary
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// fields and to help to explore the best breakdown of storage
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// within Instruction.
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constexpr uint32_t memory_masks[] = {0x0000'ffff, 0xffff'ffff};
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const uint32_t memory_mask = memory_masks[int(instruction.address_size())];
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address = (address & memory_mask) + (base & memory_mask) + instruction.displacement();
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return address;
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}
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template <Model model, typename RegistersT, typename MemoryT>
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template <bool is_write, typename DataT> void DataPointerResolver<model, RegistersT, MemoryT>::access(
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RegistersT ®isters,
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MemoryT &memory,
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const Instruction<is_32bit(model)> &instruction,
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DataPointer pointer,
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DataT &value) {
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const Source source = pointer.source<false>();
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switch(source) {
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default:
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if constexpr (!is_write) {
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value = 0;
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}
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return;
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ALLREGS(value, is_write);
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case Source::DirectAddress:
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if constexpr(is_write) {
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memory.template write(instruction.segment_override(), instruction.displacement(), value);
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} else {
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value = memory.template read<DataT>(instruction.segment_override(), instruction.displacement());
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}
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break;
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case Source::Immediate:
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value = DataT(instruction.operand());
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break;
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// TODO: data_segment() will return Source::None if there was no override.
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// Fix.
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#define indirect(has_base) { \
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const auto address = effective_address<false, has_base> \
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(registers, instruction, pointer); \
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\
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if constexpr (is_write) { \
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memory.template write( \
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instruction.segment_override(), \
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address, \
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value \
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); \
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} else { \
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value = memory.template read<DataT>( \
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instruction.segment_override(), \
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address \
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); \
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} \
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}
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case Source::IndirectNoBase:
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indirect(false);
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break;
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case Source::Indirect:
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indirect(true);
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break;
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#undef indirect
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}
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}
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#undef ALLREGS
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#undef rw
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}
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#endif /* DataPointerResolver_hpp */
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@ -114,7 +114,7 @@ uint32_t address(
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RegistersT ®isters,
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MemoryT &memory
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) {
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switch(pointer.source<false>()) {
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switch(pointer.source()) {
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default: return 0;
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case Source::eAX: return *register_<model, IntT, Source::eAX>(registers);
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case Source::eCX: return *register_<model, IntT, Source::eCX>(registers);
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@ -844,7 +844,7 @@ void call_far(InstructionT &instruction,
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// TODO: eliminate 16-bit assumption below.
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uint16_t source_address = 0;
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const auto pointer = instruction.destination();
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switch(pointer.template source<false>()) {
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switch(pointer.source()) {
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default:
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case Source::Immediate: flow_controller.call(instruction.segment(), instruction.offset()); return;
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@ -876,7 +876,7 @@ void jump_far(InstructionT &instruction,
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// TODO: eliminate 16-bit assumption below.
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uint16_t source_address = 0;
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const auto pointer = instruction.destination();
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switch(pointer.template source<false>()) {
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switch(pointer.source()) {
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default:
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case Source::Immediate: flow_controller.jump(instruction.segment(), instruction.offset()); return;
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@ -1547,7 +1547,7 @@ template <
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const auto source = [&]() -> IntT& {
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return *resolve<model, IntT>(
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instruction,
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instruction.source().template source<false>(),
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instruction.source().source(),
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instruction.source(),
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registers,
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memory,
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@ -1557,7 +1557,7 @@ template <
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const auto destination = [&]() -> IntT& {
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return *resolve<model, IntT>(
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instruction,
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instruction.destination().template source<false>(),
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instruction.destination().source(),
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instruction.destination(),
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registers,
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memory,
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@ -1576,7 +1576,7 @@ template <
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const auto shift_count = [&]() -> uint8_t {
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static constexpr uint8_t mask = (model != Model::i8086) ? 0x1f : 0xff;
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switch(instruction.source().template source<false>()) {
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switch(instruction.source().source()) {
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case Source::None: return 1;
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case Source::Immediate: return uint8_t(instruction.operand()) & mask;
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default: return registers.cl() & mask;
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@ -372,7 +372,7 @@ std::string InstructionSet::x86::to_string(
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};
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using Source = InstructionSet::x86::Source;
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const Source source = pointer.source<false>();
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const Source source = pointer.source();
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switch(source) {
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// to_string handles all direct register names correctly.
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default: return InstructionSet::x86::to_string(source, operation_size);
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@ -595,10 +595,7 @@ class DataPointer {
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);
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}
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template <bool obscure_indirectNoBase = false> constexpr Source source() const {
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if constexpr (obscure_indirectNoBase) {
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return (source_ >= Source::IndirectNoBase) ? Source::Indirect : source_;
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}
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constexpr Source source() const {
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return source_;
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}
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@ -634,10 +631,7 @@ class DataPointer {
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return Source::DS;
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}
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template <bool obscure_indirectNoBase = false> constexpr Source base() const {
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if constexpr (obscure_indirectNoBase) {
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return (source_ <= Source::IndirectNoBase) ? Source::None : sib_.base();
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}
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constexpr Source base() const {
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return sib_.base();
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}
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@ -805,11 +799,11 @@ template<bool is_32bit> class Instruction {
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return DataSize(source_data_dest_sib_ >> 14);
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}
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int length() const {
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const int short_length = (source_data_dest_sib_ >> 10) & 15;
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if(short_length) return short_length;
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return length_extension() >> 6;
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}
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// int length() const {
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// const int short_length = (source_data_dest_sib_ >> 10) & 15;
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// if(short_length) return short_length;
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// return length_extension() >> 6;
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// }
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ImmediateT operand() const {
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const ImmediateT ops[] = {0, operand_extension()};
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@ -1048,7 +1048,6 @@
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4BE21219253FCE9C00435408 /* AppleIIgs.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BE21214253FCE9C00435408 /* AppleIIgs.cpp */; };
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4BE2121A253FCE9C00435408 /* AppleIIgs.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BE21214253FCE9C00435408 /* AppleIIgs.cpp */; };
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4BE34438238389E10058E78F /* AtariSTVideoTests.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4BE34437238389E10058E78F /* AtariSTVideoTests.mm */; };
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4BE3C69727CC32DC000EAD28 /* x86DataPointerTests.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4BE3C69627CC32DC000EAD28 /* x86DataPointerTests.mm */; };
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4BE76CF922641ED400ACD6FA /* QLTests.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4BE76CF822641ED300ACD6FA /* QLTests.mm */; };
|
||||
4BE8EB6625C750B50040BC40 /* DAT.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BE8EB6425C750B50040BC40 /* DAT.cpp */; };
|
||||
4BE90FFD22D5864800FB464D /* MacintoshVideoTests.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4BE90FFC22D5864800FB464D /* MacintoshVideoTests.mm */; };
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@ -2214,9 +2213,7 @@
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4BE3231520532AA7006EF799 /* Target.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = Target.hpp; sourceTree = "<group>"; };
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||||
4BE3231620532BED006EF799 /* Target.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = Target.hpp; sourceTree = "<group>"; };
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||||
4BE34437238389E10058E78F /* AtariSTVideoTests.mm */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.objcpp; path = AtariSTVideoTests.mm; sourceTree = "<group>"; };
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||||
4BE3C69327C793EF000EAD28 /* DataPointerResolver.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = DataPointerResolver.hpp; sourceTree = "<group>"; };
|
||||
4BE3C69527CBC540000EAD28 /* Model.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = Model.hpp; sourceTree = "<group>"; };
|
||||
4BE3C69627CC32DC000EAD28 /* x86DataPointerTests.mm */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.objcpp; path = x86DataPointerTests.mm; sourceTree = "<group>"; };
|
||||
4BE76CF822641ED300ACD6FA /* QLTests.mm */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.objcpp; path = QLTests.mm; sourceTree = "<group>"; };
|
||||
4BE845201F2FF7F100A5EA22 /* CRTC6845.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = CRTC6845.hpp; sourceTree = "<group>"; };
|
||||
4BE8EB5425C0E9D40040BC40 /* Disassembler.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = Disassembler.hpp; sourceTree = "<group>"; };
|
||||
@ -4393,7 +4390,6 @@
|
||||
4B8DD3672633B2D400B3C866 /* SpectrumVideoContentionTests.mm */,
|
||||
4B2AF8681E513FC20027EE29 /* TIATests.mm */,
|
||||
4B1D08051E0F7A1100763741 /* TimeTests.mm */,
|
||||
4BE3C69627CC32DC000EAD28 /* x86DataPointerTests.mm */,
|
||||
4BEE4BD325A26E2B00011BD2 /* x86DecoderTests.mm */,
|
||||
4BDA8234261E8E000021AA19 /* Z80ContentionTests.mm */,
|
||||
4BB73EB81B587A5100552FC2 /* Info.plist */,
|
||||
@ -5001,7 +4997,6 @@
|
||||
children = (
|
||||
4BEDA3B925B25563000C2DBD /* Decoder.cpp */,
|
||||
4B69DEB52AB79E4F0055B217 /* Instruction.cpp */,
|
||||
4BE3C69327C793EF000EAD28 /* DataPointerResolver.hpp */,
|
||||
4BEDA3B825B25563000C2DBD /* Decoder.hpp */,
|
||||
4BEDA3DB25B2588F000C2DBD /* Instruction.hpp */,
|
||||
4BE3C69527CBC540000EAD28 /* Model.hpp */,
|
||||
@ -6251,7 +6246,6 @@
|
||||
4B7752AA28217E370073E2C5 /* ROMCatalogue.cpp in Sources */,
|
||||
4B778F0323A5EBB00000D260 /* FAT12.cpp in Sources */,
|
||||
4B778F4023A5F1910000D260 /* z8530.cpp in Sources */,
|
||||
4BE3C69727CC32DC000EAD28 /* x86DataPointerTests.mm in Sources */,
|
||||
4B778EFD23A5EB8E0000D260 /* AppleDSK.cpp in Sources */,
|
||||
4B7752B728217EF40073E2C5 /* Chipset.cpp in Sources */,
|
||||
4B778EFB23A5EB7E0000D260 /* HFE.cpp in Sources */,
|
||||
|
||||
@ -1,103 +0,0 @@
|
||||
//
|
||||
// x86DataPointerTests.m
|
||||
// Clock Signal
|
||||
//
|
||||
// Created by Thomas Harte on 27/02/2022.
|
||||
// Copyright 2022 Thomas Harte. All rights reserved.
|
||||
//
|
||||
|
||||
#import <XCTest/XCTest.h>
|
||||
|
||||
#include "../../../InstructionSets/x86/DataPointerResolver.hpp"
|
||||
#include <map>
|
||||
|
||||
using namespace InstructionSet::x86;
|
||||
|
||||
@interface x86DataPointerTests : XCTestCase
|
||||
@end
|
||||
|
||||
@implementation x86DataPointerTests
|
||||
|
||||
- (void)test16bitSize1 {
|
||||
const DataPointer indirectPointer(
|
||||
Source::eAX, Source::eDI, 0
|
||||
);
|
||||
const DataPointer registerPointer(
|
||||
Source::eBX
|
||||
);
|
||||
|
||||
struct Registers {
|
||||
uint16_t ax = 0x1234, di = 0x00ee;
|
||||
uint8_t bl = 0xaa;
|
||||
|
||||
template <typename DataT, Register r> DataT read() {
|
||||
assert(is_sized<DataT>(r));
|
||||
switch(r) {
|
||||
case Register::AX: return ax;
|
||||
case Register::BL: return bl;
|
||||
case Register::DI: return di;
|
||||
default: return 0;
|
||||
}
|
||||
}
|
||||
template <typename DataT, Register r> void write(DataT value) {
|
||||
assert(is_sized<DataT>(r));
|
||||
switch(r) {
|
||||
case Register::BL: bl = value; break;
|
||||
default: assert(false);
|
||||
}
|
||||
}
|
||||
} registers;
|
||||
|
||||
struct Memory {
|
||||
std::map<uint32_t, uint8_t> data;
|
||||
|
||||
template<typename DataT> DataT read(Source, uint32_t address) {
|
||||
if(address == 0x1234 + 0x00ee) return 0xff;
|
||||
return 0;
|
||||
}
|
||||
template<typename DataT> void write(Source, uint32_t address, DataT value) {
|
||||
data[address] = value;
|
||||
}
|
||||
} memory;
|
||||
|
||||
// TODO: construct this more formally; the code below just assumes size = 1, which is not a contractual guarantee.
|
||||
const auto instruction = Instruction<false>();
|
||||
|
||||
using Resolver = DataPointerResolver<Model::i8086, Registers, Memory>;
|
||||
const uint8_t memoryValue = Resolver::read<uint8_t>(
|
||||
registers,
|
||||
memory,
|
||||
instruction,
|
||||
indirectPointer
|
||||
);
|
||||
registers.ax = 0x0100;
|
||||
Resolver::write<uint8_t>(
|
||||
registers,
|
||||
memory,
|
||||
instruction,
|
||||
indirectPointer,
|
||||
0xef
|
||||
);
|
||||
|
||||
XCTAssertEqual(memoryValue, 0xff);
|
||||
XCTAssertEqual(memory.data[0x01ee], 0xef);
|
||||
|
||||
const uint8_t registerValue = Resolver::read<uint8_t>(
|
||||
registers,
|
||||
memory,
|
||||
instruction,
|
||||
registerPointer
|
||||
);
|
||||
Resolver::write<uint8_t>(
|
||||
registers,
|
||||
memory,
|
||||
instruction,
|
||||
registerPointer,
|
||||
0x93
|
||||
);
|
||||
|
||||
XCTAssertEqual(registerValue, 0xaa);
|
||||
XCTAssertEqual(registers.bl, 0x93);
|
||||
}
|
||||
|
||||
@end
|
||||
@ -12,7 +12,6 @@
|
||||
#include <optional>
|
||||
#include <vector>
|
||||
#include "../../../InstructionSets/x86/Decoder.hpp"
|
||||
#include "../../../InstructionSets/x86/DataPointerResolver.hpp"
|
||||
|
||||
using namespace InstructionSet::x86;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user