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Merge pull request #1152 from TomHarte/New6502TestGenerator
Generalise 65816 test generator to handle all 6502esques.
This commit is contained in:
commit
3bd931937f
@ -14,20 +14,27 @@
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#include <vector>
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#include <vector>
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#include <unordered_map>
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#include <unordered_map>
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#include "6502Selector.hpp"
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namespace {
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namespace {
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struct StopException {};
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struct StopException {};
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struct BusHandler: public CPU::MOS6502Esque::BusHandler<uint32_t> {
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template <CPU::MOS6502Esque::Type type>
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// Use a map to store RAM contents, in order to preserve initialised state.
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struct BusHandler: public CPU::MOS6502Esque::BusHandlerT<type> {
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std::unordered_map<uint32_t, uint8_t> ram;
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using AddressType = typename CPU::MOS6502Esque::BusHandlerT<type>::AddressType;
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std::unordered_map<uint32_t, uint8_t> inventions;
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Cycles perform_bus_operation(CPU::MOS6502Esque::BusOperation operation, uint32_t address, uint8_t *value) {
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// Use a map to store RAM contents, in order to preserve initialised state.
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std::unordered_map<AddressType, uint8_t> ram;
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std::unordered_map<AddressType, uint8_t> inventions;
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Cycles perform_bus_operation(CPU::MOS6502Esque::BusOperation operation, AddressType address, uint8_t *value) {
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// Record the basics of the operation.
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// Record the basics of the operation.
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auto &cycle = cycles.emplace_back();
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auto &cycle = cycles.emplace_back();
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cycle.operation = operation;
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cycle.operation = operation;
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cycle.extended_bus = processor.get_extended_bus_output();
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if constexpr (has_extended_bus_output(type)) {
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cycle.extended_bus = processor.get_extended_bus_output();
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}
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// Perform the operation, and fill in the cycle's value.
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// Perform the operation, and fill in the cycle's value.
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using BusOperation = CPU::MOS6502Esque::BusOperation;
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using BusOperation = CPU::MOS6502Esque::BusOperation;
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@ -92,25 +99,27 @@ struct BusHandler: public CPU::MOS6502Esque::BusHandler<uint32_t> {
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allow_pc_repetition = opcode == 0x54 || opcode == 0x44;
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allow_pc_repetition = opcode == 0x54 || opcode == 0x44;
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using Register = CPU::MOS6502Esque::Register;
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using Register = CPU::MOS6502Esque::Register;
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const uint32_t pc =
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const auto pc =
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processor.value_of(Register::ProgramCounter) |
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AddressType(
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(processor.value_of(Register::ProgramBank) << 16);
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processor.value_of(Register::ProgramCounter) |
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(processor.value_of(Register::ProgramBank) << 16)
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);
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inventions[pc] = ram[pc] = opcode;
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inventions[pc] = ram[pc] = opcode;
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}
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}
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int pc_overshoot = 0;
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int pc_overshoot = 0;
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std::optional<uint32_t> initial_pc;
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std::optional<AddressType> initial_pc;
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bool allow_pc_repetition = false;
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bool allow_pc_repetition = false;
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struct Cycle {
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struct Cycle {
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CPU::MOS6502Esque::BusOperation operation;
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CPU::MOS6502Esque::BusOperation operation;
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std::optional<uint32_t> address;
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std::optional<AddressType> address;
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std::optional<uint8_t> value;
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std::optional<uint8_t> value;
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int extended_bus;
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int extended_bus = 0;
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};
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};
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std::vector<Cycle> cycles;
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std::vector<Cycle> cycles;
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CPU::WDC65816::Processor<BusHandler, false> processor;
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CPU::MOS6502Esque::Processor<type, BusHandler<type>, false> processor;
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BusHandler() : processor(*this) {
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BusHandler() : processor(*this) {
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// Never run the official reset procedure.
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// Never run the official reset procedure.
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@ -118,7 +127,7 @@ struct BusHandler: public CPU::MOS6502Esque::BusHandler<uint32_t> {
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}
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}
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};
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};
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template <typename Processor> void print_registers(FILE *file, const Processor &processor, int pc_offset) {
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template <bool has_emulation, typename Processor> void print_registers(FILE *file, const Processor &processor, int pc_offset) {
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using Register = CPU::MOS6502Esque::Register;
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using Register = CPU::MOS6502Esque::Register;
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fprintf(file, "\"pc\": %d, ", (processor.value_of(Register::ProgramCounter) + pc_offset) & 65535);
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fprintf(file, "\"pc\": %d, ", (processor.value_of(Register::ProgramCounter) + pc_offset) & 65535);
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fprintf(file, "\"s\": %d, ", processor.value_of(Register::StackPointer));
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fprintf(file, "\"s\": %d, ", processor.value_of(Register::StackPointer));
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@ -126,13 +135,16 @@ template <typename Processor> void print_registers(FILE *file, const Processor &
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fprintf(file, "\"a\": %d, ", processor.value_of(Register::A));
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fprintf(file, "\"a\": %d, ", processor.value_of(Register::A));
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fprintf(file, "\"x\": %d, ", processor.value_of(Register::X));
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fprintf(file, "\"x\": %d, ", processor.value_of(Register::X));
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fprintf(file, "\"y\": %d, ", processor.value_of(Register::Y));
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fprintf(file, "\"y\": %d, ", processor.value_of(Register::Y));
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fprintf(file, "\"dbr\": %d, ", processor.value_of(Register::DataBank));
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if constexpr (has_emulation) {
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fprintf(file, "\"d\": %d, ", processor.value_of(Register::Direct));
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fprintf(file, "\"dbr\": %d, ", processor.value_of(Register::DataBank));
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fprintf(file, "\"pbr\": %d, ", processor.value_of(Register::ProgramBank));
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fprintf(file, "\"d\": %d, ", processor.value_of(Register::Direct));
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fprintf(file, "\"e\": %d, ", processor.value_of(Register::EmulationFlag));
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fprintf(file, "\"pbr\": %d, ", processor.value_of(Register::ProgramBank));
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fprintf(file, "\"e\": %d, ", processor.value_of(Register::EmulationFlag));
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}
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}
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}
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void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
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template <typename IntT>
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void print_ram(FILE *file, const std::unordered_map<IntT, uint8_t> &data) {
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fprintf(file, "\"ram\": [");
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fprintf(file, "\"ram\": [");
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bool is_first = true;
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bool is_first = true;
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for(const auto &pair: data) {
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for(const auto &pair: data) {
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@ -143,22 +155,18 @@ void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
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fprintf(file, "]");
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fprintf(file, "]");
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}
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}
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}
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// MARK: - New test generator.
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// MARK: - New test generator.
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@interface TestGenerator : NSObject
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@end
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@implementation TestGenerator
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template <CPU::MOS6502Esque::Type type> void generate() {
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BusHandler<type> handler;
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- (void)generate {
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constexpr bool has_emulation = has(type, CPU::MOS6502Esque::Register::EmulationFlag);
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BusHandler handler;
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NSString *const tempDir = NSTemporaryDirectory();
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NSString *const tempDir = NSTemporaryDirectory();
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NSLog(@"Outputting to %@", tempDir);
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NSLog(@"Outputting to %@", tempDir);
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for(int operation = 0; operation < 512; operation++) {
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for(int operation = 0; operation < (has_emulation ? 512 : 256); operation++) {
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// Make tests repeatable, at least for any given instance of
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// Make tests repeatable, at least for any given instance of
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// the runtime.
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// the runtime.
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srand(65816 + operation);
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srand(65816 + operation);
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@ -166,7 +174,10 @@ void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
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const bool is_emulated = operation & 256;
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const bool is_emulated = operation & 256;
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const uint8_t opcode = operation & 255;
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const uint8_t opcode = operation & 255;
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NSString *const targetName = [NSString stringWithFormat:@"%@%02x.%c.json", tempDir, opcode, is_emulated ? 'e' : 'n'];
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NSString *const targetName =
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has_emulation ?
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[NSString stringWithFormat:@"%@%02x.%c.json", tempDir, opcode, is_emulated ? 'e' : 'n'] :
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[NSString stringWithFormat:@"%@%02x.json", tempDir, opcode];
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FILE *const target = fopen(targetName.UTF8String, "wt");
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FILE *const target = fopen(targetName.UTF8String, "wt");
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bool is_first_test = true;
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bool is_first_test = true;
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@ -186,21 +197,28 @@ void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
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handler.processor.set_value_of(Register::Y, rand() >> 8);
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handler.processor.set_value_of(Register::Y, rand() >> 8);
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handler.processor.set_value_of(Register::ProgramCounter, rand() >> 8);
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handler.processor.set_value_of(Register::ProgramCounter, rand() >> 8);
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handler.processor.set_value_of(Register::StackPointer, rand() >> 8);
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handler.processor.set_value_of(Register::StackPointer, rand() >> 8);
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handler.processor.set_value_of(Register::DataBank, rand() >> 8);
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handler.processor.set_value_of(Register::ProgramBank, rand() >> 8);
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handler.processor.set_value_of(Register::Direct, rand() >> 8);
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// ... except for emulation mode, which is a given.
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if(has_emulation) {
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// And is set last to ensure proper internal state is applied.
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handler.processor.set_value_of(Register::DataBank, rand() >> 8);
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handler.processor.set_value_of(Register::EmulationFlag, is_emulated);
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handler.processor.set_value_of(Register::ProgramBank, rand() >> 8);
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handler.processor.set_value_of(Register::Direct, rand() >> 8);
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// ... except for emulation mode, which is a given.
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// And is set last to ensure proper internal state is applied.
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handler.processor.set_value_of(Register::EmulationFlag, is_emulated);
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}
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// Establish the opcode.
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// Establish the opcode.
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handler.setup(opcode);
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handler.setup(opcode);
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// Dump initial state.
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// Dump initial state.
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fprintf(target, "{ \"name\": \"%02x %c %d\", ", opcode, is_emulated ? 'e' : 'n', test + 1);
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if(has_emulation) {
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fprintf(target, "{ \"name\": \"%02x %c %d\", ", opcode, is_emulated ? 'e' : 'n', test + 1);
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} else {
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fprintf(target, "{ \"name\": \"%02x %d\", ", opcode, test + 1);
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}
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fprintf(target, "\"initial\": {");
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fprintf(target, "\"initial\": {");
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print_registers(target, handler.processor, 0);
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print_registers<has_emulation>(target, handler.processor, 0);
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// Run to the second opcode fetch.
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// Run to the second opcode fetch.
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try {
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try {
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@ -212,7 +230,7 @@ void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
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// Dump final state.
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// Dump final state.
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fprintf(target, "}, \"final\": {");
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fprintf(target, "}, \"final\": {");
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print_registers(target, handler.processor, handler.pc_overshoot);
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print_registers<has_emulation>(target, handler.processor, handler.pc_overshoot);
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print_ram(target, handler.ram);
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print_ram(target, handler.ram);
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fprintf(target, "}, ");
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fprintf(target, "}, ");
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@ -247,12 +265,6 @@ void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
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assert(false);
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assert(false);
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}
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}
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using ExtendedBusOutput = CPU::WDC65816::ExtendedBusOutput;
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const bool emulation = cycle.extended_bus & ExtendedBusOutput::Emulation;
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const bool memory_size = cycle.extended_bus & ExtendedBusOutput::MemorySize;
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const bool index_size = cycle.extended_bus & ExtendedBusOutput::IndexSize;
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const bool memory_lock = cycle.extended_bus & ExtendedBusOutput::MemoryLock;
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fprintf(target, "[");
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fprintf(target, "[");
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if(cycle.address) {
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if(cycle.address) {
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fprintf(target, "%d, ", *cycle.address);
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fprintf(target, "%d, ", *cycle.address);
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@ -264,16 +276,31 @@ void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
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} else {
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} else {
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fprintf(target, "null, ");
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fprintf(target, "null, ");
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}
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}
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fprintf(target, "\"%c%c%c%c%c%c%c%c\"]",
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vda ? 'd' : '-',
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if(has_emulation) {
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vpa ? 'p' : '-',
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using ExtendedBusOutput = CPU::WDC65816::ExtendedBusOutput;
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vpb ? 'v' : '-',
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const bool emulation = cycle.extended_bus & ExtendedBusOutput::Emulation;
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wait ? '-' : (read ? 'r' : 'w'),
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const bool memory_size = cycle.extended_bus & ExtendedBusOutput::MemorySize;
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wait ? '-' : (emulation ? 'e' : '-'),
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const bool index_size = cycle.extended_bus & ExtendedBusOutput::IndexSize;
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wait ? '-' : (memory_size ? 'm' : '-'),
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const bool memory_lock = cycle.extended_bus & ExtendedBusOutput::MemoryLock;
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wait ? '-' : (index_size ? 'x' : '-'),
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wait ? '-' : (memory_lock ? 'l' : '-')
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fprintf(target, "\"%c%c%c%c%c%c%c%c\"]",
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);
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vda ? 'd' : '-',
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vpa ? 'p' : '-',
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vpb ? 'v' : '-',
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wait ? '-' : (read ? 'r' : 'w'),
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wait ? '-' : (emulation ? 'e' : '-'),
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wait ? '-' : (memory_size ? 'm' : '-'),
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wait ? '-' : (index_size ? 'x' : '-'),
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wait ? '-' : (memory_lock ? 'l' : '-')
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);
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} else {
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if(read) {
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fprintf(target, "\"read\"]");
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} else {
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fprintf(target, "\"write\"]");
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}
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}
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}
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}
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// Terminate object.
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// Terminate object.
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@ -285,7 +312,7 @@ void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
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}
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}
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}
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}
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@end
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}
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// MARK: - Existing test evaluator.
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// MARK: - Existing test evaluator.
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@ -296,7 +323,7 @@ void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
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// A generator for tests; not intended to be a permanent fixture.
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// A generator for tests; not intended to be a permanent fixture.
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//- (void)testGenerate {
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//- (void)testGenerate {
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// [[[TestGenerator alloc] init] generate];
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// generate<CPU::MOS6502Esque::Type::TWDC65816>();
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//}
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//}
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@end
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@end
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@ -124,6 +124,12 @@ class ProcessorBase: public ProcessorStorage {
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@returns @c true if the 6502 is jammed; @c false otherwise.
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@returns @c true if the 6502 is jammed; @c false otherwise.
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*/
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*/
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inline bool is_jammed() const;
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inline bool is_jammed() const;
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/*!
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FOR TESTING PURPOSES ONLY: forces the processor into a state where
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the next thing it intends to do is fetch a new opcode.
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*/
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inline void restart_operation_fetch();
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};
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};
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/*!
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/*!
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@ -728,3 +728,8 @@ void ProcessorBase::set_value_of(Register r, uint16_t value) {
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default: break;
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default: break;
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}
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}
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}
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}
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void ProcessorBase::restart_operation_fetch() {
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scheduled_program_counter_ = nullptr;
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next_bus_operation_ = BusOperation::None;
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}
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@ -9,6 +9,7 @@
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#ifndef _502Selector_h
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#ifndef _502Selector_h
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#define _502Selector_h
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#define _502Selector_h
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#include "6502Esque.hpp"
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#include "../6502/6502.hpp"
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#include "../6502/6502.hpp"
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#include "../65816/65816.hpp"
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#include "../65816/65816.hpp"
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@ -45,6 +46,32 @@ template <typename BusHandler, bool uses_ready_line> class Processor<Type::TWDC6
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template <Type processor_type> class BusHandlerT: public BusHandler<uint16_t> {};
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template <Type processor_type> class BusHandlerT: public BusHandler<uint16_t> {};
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template <> class BusHandlerT<Type::TWDC65816>: public BusHandler<uint32_t> {};
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template <> class BusHandlerT<Type::TWDC65816>: public BusHandler<uint32_t> {};
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/*
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Query for implemented registers.
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*/
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constexpr bool has(Type processor_type, Register r) {
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switch(r) {
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case Register::LastOperationAddress:
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case Register::ProgramCounter:
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case Register::StackPointer:
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case Register::Flags:
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case Register::A:
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case Register::X:
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case Register::Y:
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return true;
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case Register::EmulationFlag:
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case Register::DataBank:
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case Register::ProgramBank:
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case Register::Direct:
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return processor_type == Type::TWDC65816;
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}
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}
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constexpr bool has_extended_bus_output(Type processor_type) {
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return processor_type == Type::TWDC65816;
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}
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|
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* _502Selector_h */
|
#endif /* _502Selector_h */
|
||||||
|
Loading…
Reference in New Issue
Block a user