From b7fd4de32f6053518795a0fc9e01c6e7d55e69eb Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sat, 18 Jan 2020 22:06:00 -0500 Subject: [PATCH 1/2] Ensures a one-instruction latency on the trace flag. --- Processors/68000/Implementation/68000Implementation.hpp | 6 ++++-- Processors/68000/Implementation/68000Storage.hpp | 6 ++++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/Processors/68000/Implementation/68000Implementation.hpp b/Processors/68000/Implementation/68000Implementation.hpp index e3b61d156..f04d64020 100644 --- a/Processors/68000/Implementation/68000Implementation.hpp +++ b/Processors/68000/Implementation/68000Implementation.hpp @@ -273,11 +273,12 @@ template void Proces break; } - if(trace_flag_) { + if(last_trace_flag_) { // The user has set the trace bit in the status register. active_program_ = nullptr; active_micro_op_ = short_exception_micro_ops_; populate_trap_steps(9, get_status()); + program_counter_.full -= 4; } else { #ifdef LOG_TRACE if(should_log) { @@ -310,7 +311,7 @@ template void Proces } #endif - if(signal_will_perform) { + if constexpr (signal_will_perform) { bus_handler_.will_perform(program_counter_.full - 4, decoded_instruction_.full); } @@ -363,6 +364,7 @@ template void Proces } } } + last_trace_flag_ = trace_flag_; } auto bus_program = &all_bus_steps_[active_micro_op_->bus_program]; diff --git a/Processors/68000/Implementation/68000Storage.hpp b/Processors/68000/Implementation/68000Storage.hpp index 2670ce6fc..79971d479 100644 --- a/Processors/68000/Implementation/68000Storage.hpp +++ b/Processors/68000/Implementation/68000Storage.hpp @@ -53,6 +53,8 @@ class ProcessorStorage { uint_fast32_t negative_flag_; // The negative flag is set if this value is non-zero. uint_fast32_t trace_flag_; // The trace flag is set if this value is non-zero. + uint_fast32_t last_trace_flag_ = 0; + // Bus inputs. int bus_interrupt_level_ = 0; bool dtack_ = false; @@ -498,7 +500,7 @@ class ProcessorStorage { // Switch to supervisor mode, disable the trace bit. set_is_supervisor(true); - trace_flag_ = 0; + trace_flag_ = last_trace_flag_ = 0; // Pick a vector. effective_address_[0].full = vector << 2; @@ -521,7 +523,7 @@ class ProcessorStorage { // Switch to supervisor mode, disable the trace bit. set_is_supervisor(true); - trace_flag_ = 0; + trace_flag_ = last_trace_flag_ = 0; // Pick a vector. effective_address_[0].full = vector << 2; From dca79ea10e09c907b9a86fba7cb83d34bfe2a3a6 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sat, 18 Jan 2020 22:52:53 -0500 Subject: [PATCH 2/2] Requires trace flag currently set. --- Processors/68000/Implementation/68000Implementation.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Processors/68000/Implementation/68000Implementation.hpp b/Processors/68000/Implementation/68000Implementation.hpp index f04d64020..0f32a4159 100644 --- a/Processors/68000/Implementation/68000Implementation.hpp +++ b/Processors/68000/Implementation/68000Implementation.hpp @@ -273,7 +273,7 @@ template void Proces break; } - if(last_trace_flag_) { + if(trace_flag_ && last_trace_flag_) { // The user has set the trace bit in the status register. active_program_ = nullptr; active_micro_op_ = short_exception_micro_ops_;