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Provide both compile- and run-time operation selection options.
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@ -40,12 +40,13 @@ namespace M68k {
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template <
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Model model,
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typename FlowController
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typename FlowController,
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Operation operation = Operation::Undefined
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> void perform(Preinstruction instruction, CPU::SlicedInt32 &src, CPU::SlicedInt32 &dest, Status &status, FlowController &flow_controller) {
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#define sub_overflow() ((result ^ destination) & (destination ^ source))
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#define add_overflow() ((result ^ destination) & ~(destination ^ source))
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switch(instruction.operation) {
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switch((operation != Operation::Undefined) ? operation : instruction.operation) {
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/*
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ABCD adds the lowest bytes from the source and destination using BCD arithmetic,
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obeying the extend flag.
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@ -22,13 +22,18 @@ struct NullFlowController {
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void consume_cycles(int) {}
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};
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/// Performs @c op using @c source and @c dest (which mmay be ignored as per the semantics of the operation).
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/// Performs @c instruction using @c source and @c dest (which mmay be ignored as per the semantics of the operation).
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/// And change in processor status will be applied to @c status. If this operation raises an exception, causes a
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/// branch, or consumes additional cycles due to the particular value of the operands (on the 68000, think DIV or MUL),
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/// that'll be notified to the @c flow_controller.
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///
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/// If the template parameter @c operation is not @c Operation::Undefined then that operation will be performed, ignoring
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/// whatever is specifed in @c instruction. This allows selection either at compile time or at run time; per Godbolt all modern
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/// compilers seem to be smart enough fully to optimise the compile-time case.
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template <
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Model model,
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typename FlowController
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typename FlowController,
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Operation operation = Operation::Undefined
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> void perform(Preinstruction instruction, CPU::RegisterPair32 &source, CPU::RegisterPair32 &dest, Status &status, FlowController &flow_controller);
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}
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